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From: Richard Henderson <rth@twiddle.net>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] tcg-hppa: Implement movcond
Date: Sat, 22 Sep 2012 05:43:13 -0700	[thread overview]
Message-ID: <505DB261.3010809@twiddle.net> (raw)
In-Reply-To: <20120922100107.GG29951@hall.aurel32.net>

On 2012-09-22 03:01, Aurelien Jarno wrote:
>> > +    /* ??? We can actually support a signed 14-bit arg3, but we
>> > +       only have existing constraints for a signed 11-bit.  */
>> > +    { INDEX_op_movcond_i32, { "r", "rZ", "rI", "rI", "0" } },
>> > +
> What's the problem in adding a constraint for that? The lack of
> available letters? ;-)
> 

Just a tad more involved than I had time for at the moment.
Could you go ahead and apply as-is, and I'll get back to 
that some other day?


r~

  reply	other threads:[~2012-09-22 12:43 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-22  1:46 [Qemu-devel] [PATCH] tcg-hppa: Implement movcond Richard Henderson
2012-09-22 10:01 ` Aurelien Jarno
2012-09-22 12:43   ` Richard Henderson [this message]
2012-09-22 14:55     ` Aurelien Jarno

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