From: Tom Rini <trini@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/6] am33xx: Enable UART{1,2,4,5} clocks
Date: Thu, 27 Sep 2012 10:53:05 -0700 [thread overview]
Message-ID: <50649281.5030102@ti.com> (raw)
In-Reply-To: <201209271927.37776.marex@denx.de>
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On 09/27/12 10:27, Marek Vasut wrote:
> Dear Tom Rini,
>
>> On 09/27/12 10:11, Marek Vasut wrote:
>>> Dear Tom Rini,
>>>
>>>> On 09/27/12 09:45, Marek Vasut wrote:
>>>>> Dear Tom Rini,
>>>>>
>>>>>> On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut
>>>>>> wrote:
>>>>>>> Dear Andrew Bradford,
>>>>>>>
>>>>>>>> If configured to use UART{1,2,4,5}, such as on the
>>>>>>>> Beaglebone RS232 cape, enable the required clocks
>>>>>>>> for the UART in use.
>>>>>>>>
>>>>>>>> Signed-off-by: Andrew Bradford
>>>>>>>> <andrew@bradfordembedded.com> ---
>>>>>>>>
>>>>>>>> arch/arm/cpu/armv7/am33xx/clock.c | 28
>>>>>>>> ++++++++++++++++++++++++++++ 1 file changed, 28
>>>>>>>> insertions(+)
>>>>>>>>
>>>>>>>> diff --git a/arch/arm/cpu/armv7/am33xx/clock.c
>>>>>>>> b/arch/arm/cpu/armv7/am33xx/clock.c index
>>>>>>>> 2b19506..4eb9226 100644 ---
>>>>>>>> a/arch/arm/cpu/armv7/am33xx/clock.c +++
>>>>>>>> b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6
>>>>>>>> +114,34 @@ static void enable_per_clocks(void)
>>>>>>>>
>>>>>>>> while (readl(&cmwkup->wkup_uart0ctrl) !=
>>>>>>>> PRCM_MOD_EN) ;
>>>>>>>>
>>>>>>>> + /* UART1 */ +#ifdef CONFIG_SERIAL2 +
>>>>>>>> writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while
>>>>>>>> (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) + ;
>>>>>>>
>>>>>>> Call WATCHDOG_RESET() here, fix glboally
>>>>>>
>>>>>> We don't have WATCHDOG_RESET...
>>>>>
>>>>> You do, and it opts-out to udelay(1) is most cases.
>>>>
>>>> It looks like it opts-out to {} in most cases, in
>>>> <watchdog.h>
>>>
>>> Correct, we use it to retrigger watchdog timer if implemented.
>>
>> Which the SoC support isn't doing and the rest of the code also
>> isn't trying to use. Arguably the whole file should be doing
>> udelay(1) in each of these instances and a clean up patch which
>> this series depends on might be useful.
>
> So we're changing the practice from doing WATCHDOG_RESET() to
> udelay(1) ? And we're doing so in generic code?
I think we should use WATCHDOG_RESET where it makes sense and udelay
where we're just delaying. I don't see WATCHDOG_RESET() being used
for enable this-or-that clock. But maybe I'm just really missing
something about how we use WATCHDOG_RESET in the case where it's not a
nop.
- --
Tom
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next prev parent reply other threads:[~2012-09-27 17:53 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-26 20:04 [U-Boot] [PATCH 0/6] am335x_evm: Enable UART{1,2,4,5} Andrew Bradford
2012-09-26 20:04 ` [U-Boot] [PATCH 1/6] am33xx: Enable UART{1,2,4,5} clocks Andrew Bradford
2012-09-27 12:48 ` Matt Porter
2012-09-27 16:13 ` Marek Vasut
2012-09-27 16:25 ` Tom Rini
2012-09-27 16:45 ` Marek Vasut
2012-09-27 17:07 ` Tom Rini
2012-09-27 17:11 ` Marek Vasut
2012-09-27 17:22 ` Tom Rini
2012-09-27 17:27 ` Marek Vasut
2012-09-27 17:53 ` Tom Rini [this message]
2012-10-20 0:25 ` Andrew Bradford
2012-10-20 17:48 ` Tom Rini
2012-10-20 18:57 ` Marek Vasut
2012-10-21 14:54 ` Tom Rini
2012-09-26 20:04 ` [U-Boot] [PATCH 2/6] am33xx: Enable UART{1,2,4,5} pin-mux Andrew Bradford
2012-09-27 12:49 ` Matt Porter
2012-09-26 20:04 ` [U-Boot] [PATCH 3/6] serial: Enable up to 6 eserial devices Andrew Bradford
2012-09-26 20:04 ` [U-Boot] [PATCH 4/6] console & omap-common/spl: Enable use of eserial Andrew Bradford
2012-09-27 16:34 ` Marek Vasut
[not found] ` <20121010091028.01de813d@brick>
2012-10-10 14:53 ` Marek Vasut
2012-10-10 16:00 ` Tom Rini
2012-09-26 20:04 ` [U-Boot] [PATCH 5/6] am33xx: Enable eserial device usage for ns16550 Andrew Bradford
2012-09-26 20:04 ` [U-Boot] [PATCH 6/6] am335x_evm: Enable use of UART{1,2,4,5} Andrew Bradford
2012-09-27 12:50 ` Matt Porter
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