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From: "H. Peter Anvin" <hpa@zytor.com>
To: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
Cc: Peter Hurley <peter@hurleysoftware.com>,
	"zhenzhong.duan@oracle.com" <zhenzhong.duan@oracle.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "x86@kernel.org" <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC] x86: mtrr: Constrain WB MTRR to max phys mem prior to cleanup
Date: Sat, 29 Sep 2012 13:17:58 -0700	[thread overview]
Message-ID: <50675776.10702@zytor.com> (raw)
In-Reply-To: <20120929201107.GB8329@khazad-dum.debian.net>

>
> Intel doesn't make it easy to get all processor specification updates at
> once so that I could hunt down every processor which acknowledges the
> existence of that errata before replying, so I will assume for the moment
> that the comment is mostly correct.
>

I should say: as far as I know the blacklist is there because noone has 
been willing to bother looking at if it actually matters, given how old 
the hardware is.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.


  parent reply	other threads:[~2012-09-29 20:18 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-07 17:44 [RFC] x86: mtrr: Constrain WB MTRR to max phys mem prior to cleanup Peter Hurley
2012-09-07 18:40 ` H. Peter Anvin
2012-09-10  3:54   ` zhenzhong.duan
2012-09-28 17:37     ` Peter Hurley
2012-09-29  2:41       ` Zhenzhong Duan
2012-09-29  3:16       ` H. Peter Anvin
2012-09-29 10:46         ` Henrique de Moraes Holschuh
2012-09-29 15:05           ` H. Peter Anvin
2012-09-29 20:11             ` Henrique de Moraes Holschuh
2012-09-29 20:16               ` H. Peter Anvin
2012-09-29 20:17               ` H. Peter Anvin [this message]
2012-09-29 21:25                 ` Henrique de Moraes Holschuh
  -- strict thread matches above, loose matches on Subject: below --
2012-07-24 20:51 Peter Hurley

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