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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net
Subject: Re: [Qemu-devel] [PATCH v2] target-mips: Use TCG registers for the FPU.
Date: Fri, 05 Oct 2012 07:20:01 -0700	[thread overview]
Message-ID: <506EEC91.1020606@twiddle.net> (raw)
In-Reply-To: <1348034655-2946-1-git-send-email-rth@twiddle.net>

Ping.  You gave it your Reviewed-by.

r~

On 09/18/2012 11:04 PM, Richard Henderson wrote:
> With normal FP, this doesn't have much affect on the generated code,
> because most of the FP operations are not CONST/PURE, and so we spill
> registers in about the same frequency as the explicit load/stores.
> 
> But with Loongson multimedia instructions, which are all integral and
> whose helpers are in fact CONST+PURE, this greatly improves the code.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
> 
> As requested, only generating 64-bit fp registers now.  The generated
> code looks quite good on i386.  It could be a tad better for x86_64,
> but it's still better than it was.
> 
> 
> r~
> 
> 
>  target-mips/translate.c | 96 +++++++++++++++++++++++++++----------------------
>  1 file changed, 54 insertions(+), 42 deletions(-)

  parent reply	other threads:[~2012-10-05 14:20 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-19  6:04 [Qemu-devel] [PATCH v2] target-mips: Use TCG registers for the FPU Richard Henderson
2012-09-19 20:07 ` Aurelien Jarno
2012-10-05 14:20 ` Richard Henderson [this message]
2012-10-05 17:03   ` Aurelien Jarno
2012-10-29 14:34     ` Aurelien Jarno

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