From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:55806) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLBLQ-0000et-RU for qemu-devel@nongnu.org; Mon, 08 Oct 2012 07:17:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TLBLI-0008EQ-Qt for qemu-devel@nongnu.org; Mon, 08 Oct 2012 07:17:56 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:24543) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLBLI-0008EF-KO for qemu-devel@nongnu.org; Mon, 08 Oct 2012 07:17:48 -0400 Received: from eusync2.samsung.com (mailout3.w1.samsung.com [210.118.77.13]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MBK00MDGNED4RA0@mailout3.w1.samsung.com> for qemu-devel@nongnu.org; Mon, 08 Oct 2012 12:18:13 +0100 (BST) Received: from [106.109.8.9] by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0MBK00LXUNDJA670@eusync2.samsung.com> for qemu-devel@nongnu.org; Mon, 08 Oct 2012 12:17:44 +0100 (BST) Message-id: <5072B656.2050901@samsung.com> Date: Mon, 08 Oct 2012 15:17:42 +0400 From: Evgeny Voevodin MIME-version: 1.0 References: In-reply-to: Content-type: text/plain; charset=UTF-8; format=flowed Content-transfer-encoding: 7bit Subject: Re: [Qemu-devel] Building QEMU with multiple CPU targets. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "qemu-devel@nongnu.org Developers" , Peter Crosthwaite , Kyungmin Park , John Williams , Paolo Bonzini , "Edgar E. Iglesias" , =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= On 10/08/2012 02:54 PM, Peter Maydell wrote: > On 8 October 2012 07:39, Peter Crosthwaite > wrote: >> Im currently investigating the possibility of building QEMU with >> multiple CPU architectures active concurrently. That is, I have a >> binary with both an target-arm and target-microblaze and wish to run >> them as a heterogeneous multiprocessor platform. >> >> Given the recent QOM development in making CPUs just another object, >> shouldn't be possible with a bit of Makefile and configure rework to >> build qemu-system-arm+microblaze and then create machine models >> instantiating both CPU types? >> >> Are the major complications here from either a Make or QOM perspective? > > I certainly think this would be a nice feature to have, but I suspect > the makefile/QOM bits are probably the easy parts :-) > > At the moment things like the translated code cache are basically > globals and would need to be moved to be per-CPU. Also there are > still various settings that are compile time which would need to > become runtime (though we just got rid of the 'size of physical > address type' one at least). Did anybody start this work? I'm interested in localiation of tcg per cpu. > > -- PMM > > -- Kind regards, Evgeny Voevodin, Leading Software Engineer, ASWG, Moscow R&D center, Samsung Electronics e-mail: e.voevodin@samsung.com