From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44975) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLqGl-0004aX-5t for qemu-devel@nongnu.org; Wed, 10 Oct 2012 02:59:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TLqGh-0006Tu-14 for qemu-devel@nongnu.org; Wed, 10 Oct 2012 02:59:51 -0400 Received: from mail-we0-f173.google.com ([74.125.82.173]:33675) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TLqGg-0006Tj-Qa for qemu-devel@nongnu.org; Wed, 10 Oct 2012 02:59:46 -0400 Received: by mail-we0-f173.google.com with SMTP id t11so116596wey.4 for ; Tue, 09 Oct 2012 23:59:45 -0700 (PDT) Sender: Paolo Bonzini Message-ID: <50751CDF.7000300@redhat.com> Date: Wed, 10 Oct 2012 08:59:43 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1349812584-19551-1-git-send-email-aurelien@aurel32.net> In-Reply-To: <1349812584-19551-1-git-send-email-aurelien@aurel32.net> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 00/26] tcg: rework liveness analysis and register allocator List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: qemu-devel@nongnu.org Il 09/10/2012 21:55, Aurelien Jarno ha scritto: > This patch series rework the liveness analysis and register allocator > in order to generate more optimized code, by avoiding a lot of move > instructions. I have measured a 9% performance improvement in user mode > and 4% in system mode. > > The idea behind this patch series is to free registers as soon as the > temps are not used anymore instead of waiting for a basic block end or > an op with side effects. Would it make any sense to express the saves as real TCG ops? This would have a couple of advantages: - more copy propagation and dead code elimination. Something like this: mov_i64 cc_dst,rax right now is compiled as follows: 0x5555557ac37a: mov %rbp,(%r14) # spill rax 0x5555557ac381: mov (%r14),%rbp # load rax from memory 0x5555557ac38f: mov %rbp,0x98(%r14) # spill cc_dst to memory while expressing spills as TCG ops would turn the above into effectively st_i64 rax, env, $0x98 - constant propagation using constraints. This would let tcg-i386 use effectively the mov $imm,(addr) instruction for spills of known-constant values. Paolo