From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Wang Subject: Re: [PATCH] x86/amd: Fix xen_apic_write warnings in Dom0 Date: Mon, 15 Oct 2012 14:17:40 +0200 Message-ID: <507BFEE4.3090601@amd.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Keir Fraser Cc: Keir Fraser , Jan Beulich , xen-devel List-Id: xen-devel@lists.xenproject.org On 10/15/2012 02:09 PM, Keir Fraser wrote: > On 15/10/2012 12:12, "Jan Beulich" wrote: > >>>>> On 09.10.12 at 10:06, Wei Wang wrote: >>> --- a/xen/arch/x86/cpu/amd.c >>> +++ b/xen/arch/x86/cpu/amd.c >>> @@ -485,6 +485,17 @@ static void __devinit init_amd(struct cpuinfo_x86 *c) >>> if (c->x86> 0x11) >>> set_bit(X86_FEATURE_ARAT, c->x86_capability); >>> >>> + /* >>> + * Prior to Family 0x14, perf counters are not reset during warm reboot. >>> + * We have to reset them manually. >>> + */ >>> + if (c->x86< 0x14) { >>> + wrmsrl(MSR_K7_PERFCTR0, 0); >>> + wrmsrl(MSR_K7_PERFCTR1, 0); >>> + wrmsrl(MSR_K7_PERFCTR2, 0); >>> + wrmsrl(MSR_K7_PERFCTR3, 0); >>> + } >> >> This collides with the NMI watchdog setup: smp_callin() calls >> setup_local_APIC() _before_ calling smp_store_cpu_info(), and >> hence you write zero again to an MSR possibly already in use. >> Since setup_k7_watchdog() itself does the clearing of the MSRs >> in question already, I would think that the most simple >> adjustment to your patch would be to make the condition >> >> if (nmi_watchdog != NMI_LOCAL_APIC&& c->x86< 0x14) { >> >> If you agree (and Keir doesn't object), I would commit it that way. > > Sounds good. > > Acked-by: Keir Fraser Sounds good to me too. Acked Thanks, Wei >> Jan >> >>> + >>> if (cpuid_edx(0x80000007)& (1<< 10)) { >>> rdmsr(MSR_K7_HWCR, l, h); >>> l |= (1<< 27); /* Enable read-only APERF/MPERF bit */ >> >> > > >