From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: NXP LPC32xx DT Updates for v4.7
Date: Thu, 28 Apr 2016 15:49:05 +0200 [thread overview]
Message-ID: <5081718.tFEgkGbhtW@wuerfel> (raw)
In-Reply-To: <57215540.7060706@mleia.com>
On Thursday 28 April 2016 03:11:44 Vladimir Zapolskiy wrote:
> NXP LPC32xx device tree updates for v4.7
>
> This includes a few functional changes:
> * new representation of MIC, SIC1 and SIC2 interrupt controllers,
> * disabled by default SPI1, SPI2, SSP0 and SSP1 SPI controllers in
> shared lpc32xx.dtsi file,
> * added clock sources for SPI1 and SPI2,
> * set default clock rate of HCLK PLL to main osc rate multiplied by 16.
>
> Also there are some non-functional changes:
> * flatten board DTS files by exploiting device node labels,
> * add 'partitions' device node for NAND SLC / MTD OF,
> * correct Atmel vendor prefix to describe on board AT24 EEPROMs,
> * rename board DTS files by adding SoC name prefix.
>
> Since now DTS files of LPC32xx boards match "^lpc32[2345]0-" pattern.
>
Looks all good, pulled into next/dt, thanks!
Arnd
prev parent reply other threads:[~2016-04-28 13:49 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-28 0:11 NXP LPC32xx DT Updates for v4.7 Vladimir Zapolskiy
2016-04-28 13:49 ` Arnd Bergmann [this message]
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