From: "Yan, Zheng" <zheng.z.yan@intel.com>
To: Stephane Eranian <eranian@google.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
"ak@linux.intel.com" <ak@linux.intel.com>
Subject: Re: [PATCH V2 1/7] perf, x86: Reduce lbr_sel_map size
Date: Wed, 24 Oct 2012 16:37:28 +0800 [thread overview]
Message-ID: <5087A8C8.2030200@intel.com> (raw)
In-Reply-To: <5087A574.3040507@intel.com>
On 10/24/2012 04:23 PM, Yan, Zheng wrote:
> On 10/24/2012 04:15 PM, Stephane Eranian wrote:
>> On Wed, Oct 24, 2012 at 9:49 AM, Yan, Zheng <zheng.z.yan@intel.com> wrote:
>>> On 10/24/2012 03:28 PM, Stephane Eranian wrote:
>>>> On Wed, Oct 24, 2012 at 7:59 AM, Yan, Zheng <zheng.z.yan@intel.com> wrote:
>>>>> From: "Yan, Zheng" <zheng.z.yan@intel.com>
>>>>>
>>>>> The index of lbr_sel_map is bit value of perf branch_sample_type.
>>>>> By using bit shift as index, we can reduce lbr_sel_map size.
>>>>>
>>>>> Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
>>>>> ---
>>>>> arch/x86/kernel/cpu/perf_event.h | 4 +++
>>>>> arch/x86/kernel/cpu/perf_event_intel_lbr.c | 50 ++++++++++++++----------------
>>>>> include/uapi/linux/perf_event.h | 42 +++++++++++++++++--------
>>>>> 3 files changed, 56 insertions(+), 40 deletions(-)
>>>>>
>>>>> diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
>>>>> index d3b3bb7..ea6749a 100644
>>>>> --- a/arch/x86/kernel/cpu/perf_event.h
>>>>> +++ b/arch/x86/kernel/cpu/perf_event.h
>>>>> @@ -412,6 +412,10 @@ struct x86_pmu {
>>>>> struct perf_guest_switch_msr *(*guest_get_msrs)(int *nr);
>>>>> };
>>>>>
>>>>> +enum {
>>>>> + PERF_SAMPLE_BRANCH_SELECT_MAP_SIZE = PERF_SAMPLE_BRANCH_MAX_SHIFT,
>>>>> +};
>>>>> +
>>>> What's the point on the extraneous definition?
>>>
>>> because later patches will add map PERF_SAMPLE_BRANCH_CALL_STACK, it will make
>>> "PERF_SAMPLE_BRANCH_SELECT_MAP_SIZE != PERF_SAMPLE_BRANCH_MAX_SHIFT"
>>>
>> And you are not going to do:
>>
>> enum perf_branch_sample_type_shift {
>> ...
>> PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 10
>> PERF_SAMPLE_BRANCH_MAX_SHIFT
>> };
>>
>> PERF_SAMPLE_BRANCH_CALL_STACK = 1 << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT
>>
>> Unless you're telling you are not going to add a mapping for
>> PERF_SAMPLE_CALL_STACK to the
>> lbr_sel_map[]?
>>
>
> I think include/uapi/linux/perf_event.h should only contain definition for user API.
> So I added PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT and PERF_SAMPLE_BRANCH_CALL_STACK to
> arch/x86/kernel/cpu/perf_event.h. Please check patch 1.
>
Sorry, I mean patch 2.
next prev parent reply other threads:[~2012-10-24 8:37 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-24 5:59 [PATCH V2 0/7] perf, x86: Haswell LBR call stack support Yan, Zheng
2012-10-24 5:59 ` [PATCH V2 1/7] perf, x86: Reduce lbr_sel_map size Yan, Zheng
2012-10-24 7:28 ` Stephane Eranian
2012-10-24 7:49 ` Yan, Zheng
2012-10-24 8:15 ` Stephane Eranian
2012-10-24 8:23 ` Yan, Zheng
2012-10-24 8:37 ` Yan, Zheng [this message]
2012-10-24 8:53 ` Stephane Eranian
2012-10-24 5:59 ` [PATCH V2 2/7] perf, x86: Basic Haswell LBR call stack support Yan, Zheng
2012-10-24 5:59 ` [PATCH V2 3/7] perf, x86: Introduce x86 special perf event context Yan, Zheng
2012-10-24 5:59 ` [PATCH V2 4/7] perf, x86: Save/resotre LBR stack during context switch Yan, Zheng
2012-10-24 5:59 ` [PATCH V2 5/7] perf, core: Pass perf_sample_data to perf_callchain() Yan, Zheng
2012-10-24 5:59 ` [PATCH V2 6/7] perf, x86: Use LBR call stack to get user callchain Yan, Zheng
2012-10-24 8:57 ` Stephane Eranian
2012-10-24 11:23 ` Yan, Zheng
2012-10-24 11:47 ` Stephane Eranian
2012-10-24 11:52 ` Yan, Zheng
2012-10-24 12:11 ` Stephane Eranian
2012-10-24 12:21 ` Stephane Eranian
2012-10-24 12:31 ` Andi Kleen
2012-10-24 12:36 ` Stephane Eranian
2012-10-24 12:41 ` Andi Kleen
2012-10-24 12:46 ` Yan, Zheng
2012-10-24 5:59 ` [PATCH V2 7/7] perf, x86: Discard zero length call entries in LBR call stack Yan, Zheng
2012-10-25 9:12 ` Namhyung Kim
2012-10-24 8:49 ` [PATCH V2 0/7] perf, x86: Haswell LBR call stack support Stephane Eranian
-- strict thread matches above, loose matches on Subject: below --
2013-07-01 7:23 [PATCH v2 " Yan, Zheng
2013-07-01 7:23 ` [PATCH v2 1/7] perf, x86: Reduce lbr_sel_map size Yan, Zheng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5087A8C8.2030200@intel.com \
--to=zheng.z.yan@intel.com \
--cc=a.p.zijlstra@chello.nl \
--cc=ak@linux.intel.com \
--cc=eranian@google.com \
--cc=linux-kernel@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.