From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoph Egger Subject: Re: [PATCH] x86/MCE: Implement clearbank callback for AMD Date: Thu, 25 Oct 2012 12:13:19 +0200 Message-ID: <508910BF.6030805@amd.com> References: <50782D4B.50607@amd.com> <5087F8B902000078000A3F38@nat28.tlf.novell.com> <5088F5BF.2090603@amd.com> <50891A8B02000078000A45C5@nat28.tlf.novell.com> <50890695.7040306@amd.com> <50892A7A02000078000A4627@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <50892A7A02000078000A4627@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: "xen-devel@lists.xen.org" List-Id: xen-devel@lists.xenproject.org On 10/25/12 12:03, Jan Beulich wrote: >>>> On 25.10.12 at 11:29, Christoph Egger wrote: >> On 10/25/12 10:55, Jan Beulich wrote: >>>>>> On 25.10.12 at 10:18, Christoph Egger wrote: >>>> On 10/24/12 14:18, Jan Beulich wrote: >>>>>>>> On 12.10.12 at 16:46, Christoph Egger wrote: >>>>>> +static int k8_need_clearbank_scan(enum mca_source who, uint64_t status) >>>>>> +{ >>>>>> + switch (who) { >>>>>> + case MCA_MCE_SCAN: >>>>>> + case MCA_MCE_HANDLER: >>>>>> + break; >>>>>> + default: >>>>>> + return 1; >>>>>> + } >>>>>> + >>>>>> + /* For fatal error, it shouldn't be cleared so that sticky bank >>>>>> + * have chance to be handled after reboot by polling. >>>>>> + */ >>>>>> + if ( (status & MCi_STATUS_UC) && (status & MCi_STATUS_PCC) ) >>>>>> + return 0; >>>>>> + /* Spurious need clear bank */ >>>>>> + if ( !(status & MCi_STATUS_OVER) >>>>>> + && (status & MCi_STATUS_UC) && !(status & MCi_STATUS_EN)) >>>>>> + return 1; >>>>>> + >>>>>> + return 1; >>>>>> } >>>>> >>>>> So what's the purpose of first conditionally returning 1, and then >>>>> also doing so unconditionally? Do anticipate to insert code between >>>>> the two parts within the very near future? Otherwise I'd drop the >>>>> whole if() construct. >>>> >>>> This function is derived from intel_need_clearbank_scan(). >>>> I just took over the relevant parts for AMD. >>> >>> But that would suggest that the final return be "return 0" rather >>> than "return 1". >>> >>> Further, the Intel code does no extra checking for the >>> MCA_MCE_HANDLER case, so I'd like you to confirm that this is >>> indeed to be different for your CPUs. >> >> I just noticed that MCA_MCE_HANDLER is not used at all and can be >> removed entirely. > > Will do. Ok, thanks. > But how about the "return" related question above? I just run some tests. Remove this part: > + /* Spurious need clear bank */ > + if ( !(status & MCi_STATUS_OVER) > + && (status & MCi_STATUS_UC) && !(status & MCi_STATUS_EN)) > + return 1; Christoph -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85689 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632