From: Igor Mitsyanko <i.mitsyanko@samsung.com>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: vineshp@xilinx.com, peter.maydell@linaro.org,
qemu-devel@nongnu.org, Kirill Batuzov <batuzovk@ispras.ru>,
Kyungmin Park <kyungmin.park@samsung.com>,
john.williams@xilinx.com, edgar.iglesias@gmail.com,
afaerber@suse.de
Subject: Re: [Qemu-devel] [PATCH v5 1/2] pl330: Initial version
Date: Mon, 29 Oct 2012 13:41:05 +0400 [thread overview]
Message-ID: <508E4F31.4090409@samsung.com> (raw)
In-Reply-To: <dfd3f7380c9ea60418a78139027101ab26ead4d2.1351492311.git.peter.crosthwaite@xilinx.com>
Good day, Peter)
On 10/29/2012 10:35 AM, Peter Crosthwaite wrote:
> Device model for Primecell PL330 dma controller.
>
> +
> +static Property pl330_properties[] = {
> + /* CR0 */
> + DEFINE_PROP_UINT8("num_chnls", PL330, num_chnls, 8),
> + DEFINE_PROP_UINT8("num_periph_req", PL330, num_periph_req, 8),
> + DEFINE_PROP_UINT8("num_events", PL330, num_events, 8),
> + DEFINE_PROP_UINT8("mgr_ns_at_rst", PL330, mgr_ns_at_rst, 0),
> + /* CR1 */
> + DEFINE_PROP_UINT8("i-cache_len", PL330, i_cache_len, 4),
> + DEFINE_PROP_UINT8("num_i-cache_lines", PL330, num_i_cache_lines, 8),
> +
> + DEFINE_PROP_UINT8("mgr_ns_at_rst", PL330, mgr_ns_at_rst, 0),
That's a duplicate, you had the same property three rows before.
> +
> + /* CR2-4 */
> + DEFINE_PROP_UINT32("boot_addr", PL330, cfg[CFG_BOOT_ADDR], 0),
> + DEFINE_PROP_UINT32("INS", PL330, cfg[CFG_INS], 0),
> + DEFINE_PROP_UINT32("PNS", PL330, cfg[CFG_PNS], 0),
> + /* CRD */
> + DEFINE_PROP_UINT8("data_width", PL330, data_width, 0),
You do not decode this value in pl330_init() like you do for, for
example, i_cache_len property. I think default value
here should be 32, which corresponds to 0b010 in LSB of CRD register.
And you should also check for reserved
values of this property and, perhaps, hw_error() on them.
> + DEFINE_PROP_UINT8("wr_cap", PL330, wr_cap, 0),
> + DEFINE_PROP_UINT8("wr_q_dep", PL330, wr_q_dep, 0),
> + DEFINE_PROP_UINT8("rd_cap", PL330, rd_cap, 0),
> + DEFINE_PROP_UINT8("rd_q_dep", PL330, rd_q_dep, 0),
> + DEFINE_PROP_UINT16("data_buffer_dep", PL330, data_buffer_dep, 0),
> +
> + DEFINE_PROP_END_OF_LIST(),
> +};
> +
> +static void pl330_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> + SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
> +
> + k->init = pl330_init;
> + dc->reset = pl330_reset;
> + dc->props = pl330_properties;
> + dc->vmsd = &vmstate_pl330;
> +}
> +
> +static const TypeInfo pl330_type_info = {
> + .name = "pl330",
> + .parent = TYPE_SYS_BUS_DEVICE,
> + .instance_size = sizeof(PL330),
> + .class_init = pl330_class_init,
> +};
> +
> +static void pl330_register_types(void)
> +{
> + type_register_static(&pl330_type_info);
> +}
> +
> +type_init(pl330_register_types)
--
Mitsyanko Igor
ASWG, Moscow R&D center, Samsung Electronics
email: i.mitsyanko@samsung.com
next prev parent reply other threads:[~2012-10-29 9:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-29 6:35 [Qemu-devel] [PATCH v5 0/2] These patches add support for the Primcell PL330 DMA controller and add it to the Xilinx Zynq machine model. Patch 1 is the device model. Patch 2 is the machine model update Peter Crosthwaite
2012-10-29 6:35 ` [Qemu-devel] [PATCH v5 1/2] pl330: Initial version Peter Crosthwaite
2012-10-29 8:32 ` Peter Maydell
2012-10-30 0:59 ` Peter Crosthwaite
2012-10-30 9:51 ` Avi Kivity
2012-10-30 13:42 ` Peter Crosthwaite
2012-10-30 13:57 ` Avi Kivity
2012-10-29 9:41 ` Igor Mitsyanko [this message]
2012-10-30 1:00 ` Peter Crosthwaite
2012-10-29 6:35 ` [Qemu-devel] [PATCH v5 2/2] xilinx_zynq: added pl330 to machine model Peter Crosthwaite
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