From mboxrd@z Thu Jan  1 00:00:00 1970
From: =?ISO-8859-1?Q?Antti_Koskip=E4=E4?=
 <antti.koskipaa@linux.intel.com>
Subject: Re: [PATCH 4/8] drm/i915: implement
 WaDisableVLVClockGating_VBIIssue on VLV
Date: Thu, 01 Nov 2012 16:48:17 +0200
Message-ID: <50928BB1.3060904@linux.intel.com>
References: <1351192548-2992-1-git-send-email-jbarnes@virtuousgeek.org>
	<1351192548-2992-4-git-send-email-jbarnes@virtuousgeek.org>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Return-path: <intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org>
Received: from mga02.intel.com (mga02.intel.com [134.134.136.20])
	by gabe.freedesktop.org (Postfix) with ESMTP id B4D299E93E
	for <intel-gfx@lists.freedesktop.org>;
	Thu,  1 Nov 2012 07:48:10 -0700 (PDT)
In-Reply-To: <1351192548-2992-4-git-send-email-jbarnes@virtuousgeek.org>
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
	<mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

Hi,

On 10/25/12 22:15, Jesse Barnes wrote:
> This allows us to get the right vblank interrupt frequency.
> 
> v2: pull in register definition
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_reg.h |    2 ++
>  drivers/gpu/drm/i915/intel_pm.c |    7 +++++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6464eaa..4aec0a3 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -556,6 +556,8 @@
>  #define IIR		0x020a4
>  #define IMR		0x020a8
>  #define ISR		0x020ac
> +#define VLV_GUNIT_CLOCK_GATE	0x182060

Where did you pull this offset from? It's not in the Bspec.


> +#define   GCFG_DIS		(1<<8)
>  #define VLV_IIR_RW	0x182084
>  #define VLV_IER		0x1820a0
>  #define VLV_IIR		0x1820a4
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d04e87f..88c154c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3713,6 +3713,13 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
>  		   PIPEA_HLINE_INT_EN | PIPEA_VBLANK_INT_EN |
>  		   SPRITEB_FLIPDONE_INT_EN | SPRITEA_FLIPDONE_INT_EN |
>  		   PLANEA_FLIPDONE_INT_EN);
> +
> +	/*
> +	 * WaDisableVLVClockGating_VBIIssue
> +	 * Disable clock gating on th GCFG unit to prevent a delay
> +	 * in the reporting of vblank events.
> +	 */
> +	I915_WRITE(VLV_GUNIT_CLOCK_GATE, GCFG_DIS);
>  }
>  
>  static void g4x_init_clock_gating(struct drm_device *dev)

-- 
- Antti