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From: Gerd Hoffmann <kraxel@redhat.com>
To: Xudong Hao <xudong.hao@intel.com>
Cc: kevin@koconnor.net, seabios@seabios.org, kvm@vger.kernel.org,
	avi@redhat.com
Subject: Re: [PATCH] seabios/pci: enable 64 bit bar on seabios
Date: Fri, 02 Nov 2012 09:59:55 +0100	[thread overview]
Message-ID: <50938B8B.8050804@redhat.com> (raw)
In-Reply-To: <1351834928-25975-1-git-send-email-xudong.hao@intel.com>

On 11/02/12 06:42, Xudong Hao wrote:
> 64 bit bar sizing and MMIO allocation. The 64 bit window is placed above high
> memory, top down from the end of guest physical address space.

What problem you are trying to fix?  The existing code should handle
64bit bars just fine.  By default they are placed below 4G though for
compatibility reasons (make old 32bit guests happy).  When running out
of address space seabios will try map them above 4G though to make room
below 4G.

Mapping your 64bit PCI bars above 4G unconditionally (for testing or
other reasons) can simply be done this way:

--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -599,7 +599,7 @@ static void pci_bios_map_devices(struct pci_bus *busses)
 {
     pcimem_start = RamSize;

-    if (pci_bios_init_root_regions(busses)) {
+    if (1 /* pci_bios_init_root_regions(busses) */) {
         struct pci_region r64_mem, r64_pref;
         r64_mem.list = NULL;
         r64_pref.list = NULL;

We might want add a config option for this.

cheers,
  Gerd


  reply	other threads:[~2012-11-02  9:21 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-11-02  5:42 [PATCH] seabios/pci: enable 64 bit bar on seabios Xudong Hao
2012-11-02  8:59 ` Gerd Hoffmann [this message]
2012-11-04 10:27   ` Hao, Xudong
2012-11-05  9:08     ` Gerd Hoffmann
2012-11-05  9:24       ` Hao, Xudong
2012-11-02 12:40 ` Kevin O'Connor

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