From: Xi Wang <xi.wang@gmail.com>
To: Xiangliang Yu <yuxiangl@marvell.com>
Cc: James Bottomley <James.Bottomley@HansenPartnership.com>,
"linux-scsi@vger.kernel.org" <linux-scsi@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/3] [SCSI] mvsas: fix shift in mvs_94xx_free_reg_set()
Date: Fri, 09 Nov 2012 08:44:21 -0500 [thread overview]
Message-ID: <509D08B5.2080303@gmail.com> (raw)
In-Reply-To: <F766E4F80769BD478052FB6533FA745D25EA5FB180@SC-VEXCH4.marvell.com>
On 11/9/12 2:30 AM, Xiangliang Yu wrote:
> Agree with James, and just need to do NOT operation one time
Thanks for reviewing the patches.
Okay I'll remove patch 2 in v2 then.
> About patch 3, I check the ffz code and found it will check ~0 conditions.
Can you point me to the ~0 check in ffz code? I also feel like using
__ffs64 makes the code simpler.
Does patch 1 look good to you? Thanks.
- xi
next prev parent reply other threads:[~2012-11-09 13:44 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-05 19:53 [PATCH 0/3] [SCSI] mvsas: fix multiple shift issues Xi Wang
2012-11-05 19:53 ` [PATCH 1/3] [SCSI] mvsas: fix shift in mvs_94xx_assign_reg_set() Xi Wang
2012-11-05 19:53 ` [PATCH 2/3] [SCSI] mvsas: fix shift in mvs_94xx_free_reg_set() Xi Wang
2012-11-06 12:06 ` James Bottomley
2012-11-06 20:55 ` Xi Wang
2012-11-09 7:30 ` Xiangliang Yu
2012-11-09 13:44 ` Xi Wang [this message]
2012-11-16 7:39 ` Xiangliang Yu
2012-11-05 19:53 ` [PATCH 3/3] [SCSI] mvsas: fix shift in mv_ffc64() Xi Wang
2012-11-16 19:40 ` [PATCH v2] [SCSI] mvsas: fix undefined bit shift Xi Wang
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