From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:59866) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tfb7X-0007qN-Vr for qemu-devel@nongnu.org; Mon, 03 Dec 2012 13:52:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tfb7R-0005Rx-E4 for qemu-devel@nongnu.org; Mon, 03 Dec 2012 13:51:59 -0500 Received: from mailout2.w1.samsung.com ([210.118.77.12]:19798) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tfb7R-0005Rh-8H for qemu-devel@nongnu.org; Mon, 03 Dec 2012 13:51:53 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MEG00FSEXU212B0@mailout2.w1.samsung.com> for qemu-devel@nongnu.org; Mon, 03 Dec 2012 18:54:29 +0000 (GMT) Received: from [106.109.9.127] by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0MEG00M9ZXQDNSA0@eusync2.samsung.com> for qemu-devel@nongnu.org; Mon, 03 Dec 2012 18:51:50 +0000 (GMT) Date: Mon, 03 Dec 2012 22:51:49 +0400 From: Igor Mitsyanko In-reply-to: <1354417042-8818-4-git-send-email-andreas.faerber@web.de> Message-id: <50BCF4C5.8000006@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=UTF-8; format=flowed Content-transfer-encoding: QUOTED-PRINTABLE References: <1354417042-8818-1-git-send-email-andreas.faerber@web.de> <1354417042-8818-4-git-send-email-andreas.faerber@web.de> Subject: Re: [Qemu-devel] [PATCH RFT 3/5] usb/ehci: Add SysBus EHCI device for Exynos4210 Reply-To: i.mitsyanko@samsung.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Cc: Kyungmin Park , peter.crosthwaite@xilinx.com, walimisdev@gmail.com, qemu-devel@nongnu.org, kraxel@redhat.com On 12/02/2012 06:57 AM, Andreas F=C3=A4rber wrote: > It uses a different capsbase and opregbase than the Xilinx device. > > Signed-off-by: Liming Wang > Signed-off-by: Andreas F=C3=A4rber > Cc: Igor Mitsyanko > --- > hw/usb/hcd-ehci-sysbus.c | 15 +++++++++++++++ > hw/usb/hcd-ehci.h | 2 ++ > 2 Dateien ge=C3=A4ndert, 17 Zeilen hinzugef=C3=BCgt(+) > > diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c > index 38e82bb..2ac61e6 100644 > --- a/hw/usb/hcd-ehci-sysbus.c > +++ b/hw/usb/hcd-ehci-sysbus.c > @@ -103,10 +103,25 @@ static const TypeInfo ehci_xlnx_type_info = =3D { > .class_init =3D ehci_xlnx_class_init, > }; > > +static void ehci_exynos4210_class_init(ObjectClass *oc, void *data= ) > +{ > + SysBusEHCIClass *sec =3D SYS_BUS_EHCI_CLASS(oc); > + > + sec->capsbase =3D 0x0; > + sec->opregbase =3D 0x40; > +} Hi, Liming, where did you get value 0x40 for opregbase? My documentat= ion=20 states that its 0x10 for Exynos4210 soc. > + > +static const TypeInfo ehci_exynos4210_type_info =3D { > + .name =3D TYPE_EXYNOS4210_EHCI, > + .parent =3D TYPE_SYS_BUS_EHCI, > + .class_init =3D ehci_exynos4210_class_init, > +}; > + > static void ehci_sysbus_register_types(void) > { > type_register_static(&ehci_type_info); > type_register_static(&ehci_xlnx_type_info); > + type_register_static(&ehci_exynos4210_type_info); > } > > type_init(ehci_sysbus_register_types) > diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h > index d8078f4..b8b6461 100644 > --- a/hw/usb/hcd-ehci.h > +++ b/hw/usb/hcd-ehci.h > @@ -314,6 +314,8 @@ struct EHCIState { > bool int_req_by_async; > }; > > +#define TYPE_EXYNOS4210_EHCI "exynos4210-usb" > + Maybe use a more descriptive name "exynos4210-usb-ehci" here, for= =20 consistency with hcd-ehci-pci.c. But anyway, I tested it, it works fine) Reviewed-by: Igor Mitsyanko > extern const VMStateDescription vmstate_ehci; > > void usb_ehci_initfn(EHCIState *s, DeviceState *dev); > --=20 Mitsyanko Igor ASWG, Moscow R&D center, Samsung Electronics email: i.mitsyanko@samsung.com