From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:53967) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TgsV3-0007JO-3U for qemu-devel@nongnu.org; Fri, 07 Dec 2012 02:37:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TgsV1-0007qM-R9 for qemu-devel@nongnu.org; Fri, 07 Dec 2012 02:37:33 -0500 Received: from mout.web.de ([212.227.17.12]:61126) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TgsV1-0007pw-HJ for qemu-devel@nongnu.org; Fri, 07 Dec 2012 02:37:31 -0500 Message-ID: <50C19CB2.8090808@web.de> Date: Fri, 07 Dec 2012 08:37:22 +0100 From: Jan Kiszka MIME-Version: 1.0 References: <20121206075935.GA10837@redhat.com> In-Reply-To: <20121206075935.GA10837@redhat.com> Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="------------enigC6D44D25B43EB5CED043D23E" Subject: Re: [Qemu-devel] removing on-demand msix vector allocation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: "qemu-devel@nongnu.org" This is an OpenPGP/MIME signed message (RFC 2440 and 3156) --------------enigC6D44D25B43EB5CED043D23E Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable On 2012-12-06 08:59, Michael S. Tsirkin wrote: > I've been looking at handling of msix masking > in qemu. It looks like all of virtio,vfio and > device assignment implemented their own > similar but slightly different thing. > So I am inclined to move this handling to common > code in msix.c, adding irqfd support right there. >=20 > While doing this rework, one of the more painful > bits of code to change is the code that dynamically > allocates msix table entries as we inject msi. > If this actually triggers it's going to be > painfully slow as route changes are rcu > write side in kernel. > Since recent kernels support direct injection, > do we care anymore? I think if you run out of > vectors, it's better to simply disable irqchip > than try to limp along changing routes all the time. But how would the logic without dynamic allocation look like? Always configure a route in the PCI layer if an MSI/MSI-X entry is enabled? That would also affect emulated devices that don't use irqfd, thus you would waste routing entries. OTOH, if don't set up such routes, you cannot support MSI/-X on older x86 kernels without direct vector injectio= n. Jan --------------enigC6D44D25B43EB5CED043D23E Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.16 (GNU/Linux) Comment: Using GnuPG with undefined - http://www.enigmail.net/ iEYEARECAAYFAlDBnLUACgkQitSsb3rl5xQy5QCg60o0vAmOzMR/jOLPViORJ2v1 sLkAmgOvhNEW9s2RafT0k8rtoSSIDp8L =PYl3 -----END PGP SIGNATURE----- --------------enigC6D44D25B43EB5CED043D23E--