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Message-ID: <50CA6712.1060809@gmail.com>
Date:   Thu, 13 Dec 2012 15:38:58 -0800
From:   David Daney <ddaney.cavm@gmail.com>
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To:     "Maciej W. Rozycki" <macro@linux-mips.org>
CC:     "Steven J. Hill" <sjhill@mips.com>, linux-mips@linux-mips.org,
        Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH v4] MIPS: Make CP0 config registers readable via sysfs.
References: <1355436915-24381-1-git-send-email-sjhill@mips.com> <alpine.LFD.2.02.1212132325180.5950@eddie.linux-mips.org>
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On 12/13/2012 03:27 PM, Maciej W. Rozycki wrote:
> On Thu, 13 Dec 2012, Steven J. Hill wrote:
>
>> Allow reading of CP0 config registers via sysfs for each core
>> in the system. The registers will show up in sysfs at the path:
>>
>>     /sys/devices/system/cpu/cpuX/configX
>
>   You're exporting privileged context outside the kernel -- have all the
> security implications been considered?

Can you give an example of what would be risky?


>  At the very least I don't think
> these files should be word-readable.
>


According to Steven's earlier comments, all he really cares about are 
the ASEs implemented.

We have a patch (that I will send soon) that exports the Cache 
configurations via the same method that x86 Cache information is 
reported, so that part of the config register information would be 
reported separately.

The rest of the CP0_ConfigX bits really report things that are only 
useful to privileged mode software, so perhaps they shouldn't be reported.

David Daney