From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?ISO-8859-1?Q?Christian_K=F6nig?= Subject: Re: [PATCH] drm/radeon: resume fence driver to last sync sequence on lockup Date: Fri, 14 Dec 2012 21:13:10 +0100 Message-ID: <50CB8856.1080505@vodafone.de> References: <1355506776-3213-1-git-send-email-j.glisse@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from outgoing.email.vodafone.de (outgoing.email.vodafone.de [139.7.28.128]) by gabe.freedesktop.org (Postfix) with ESMTP id D62C4E5EF8 for ; Fri, 14 Dec 2012 12:13:14 -0800 (PST) In-Reply-To: <1355506776-3213-1-git-send-email-j.glisse@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: j.glisse@gmail.com Cc: Jerome Glisse , dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org On 14.12.2012 18:39, j.glisse@gmail.com wrote: > From: Jerome Glisse > > After lockup we need to resume fence to last sync sequence and not > last received sequence so that all thread waiting on command stream > that lockedup resume. Otherwise GPU reset will be ineffective in most > cases. NAK. I changed this on purpose to get partial resets working, please don't change it back. The IB test code should reset this to the last synced value anyway, if it doesn't work then there is something wrong there. Christian. > > Signed-off-by: Jerome Glisse > --- > drivers/gpu/drm/radeon/radeon_fence.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c > index 22bd6c2..38233e7 100644 > --- a/drivers/gpu/drm/radeon/radeon_fence.c > +++ b/drivers/gpu/drm/radeon/radeon_fence.c > @@ -787,7 +787,7 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring) > } > rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; > rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index; > - radeon_fence_write(rdev, atomic64_read(&rdev->fence_drv[ring].last_seq), ring); > + radeon_fence_write(rdev, rdev->fence_drv[ring].sync_seq[ring], ring); > rdev->fence_drv[ring].initialized = true; > dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n", > ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);