From: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>
To: GUGLIELMO NAVARRA <guglielmo.navarra@studenti.uniparthenope.it>
Cc: "xenomai@xenomai.org" <xenomai@xenomai.org>
Subject: Re: [Xenomai] [Xenomai-help] Latency calculation on da850 (Omap L138)
Date: Sat, 15 Dec 2012 15:50:35 +0100 [thread overview]
Message-ID: <50CC8E3B.8030109@xenomai.org> (raw)
In-Reply-To: <7385E066AECB78449EEDFA7EE2A2B2B60A052DCB@DB3PRD0410MB355.eurprd04.prod.outlook.com>
On 12/15/2012 03:42 PM, GUGLIELMO NAVARRA wrote:
> Reply for FCSE: Omap L138 is based on ARM926ejs (FCSE supported)
> Reply for tsc_info hardcode: The DAVINCI_TIMER0_BASE macro represents
> the physical address of the timer 0 (corrected), which is 64bit timer
> that i use (unchained mode) 32bit for clockevent (BOTTOM) and 32bit
> for clocksource (TOP) . Instead "t->base" represents the virtual
> address obtained from ioremap.
The Xenomai mailing list is an old style mailing list where we do not
top-post. So, please stop top-posting.
If the virtual address of the hardware counter is t->base + t->tim_off
and
t->base is the ioremap of DAVICIN_TIMER0_BASE then the counter physical
address is:
DAVINCI_TIMER0_BASE + t->tim_off
Hence my first question (which you did not answer):
"what about t->tim_off ?"
What I said was if other SOCs or other boards use different timer
configuration where t->base is not DAVINCI_TIMER0_BASE, then you should
not hardcode DAVINCI_TIMER0_BASE in the tsc physical address, yes this
will work in your case, but not for other possible configurations.
--
Gilles.
next prev parent reply other threads:[~2012-12-15 14:50 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-15 12:07 [Xenomai] [Xenomai-help] Latency calculation on da850 (Omap L138) GUGLIELMO NAVARRA
2012-12-15 12:20 ` Gilles Chanteperdrix
[not found] ` <7385E066AECB78449EEDFA7EE2A2B2B60A052DA8@DB3PRD0410MB355.eurprd04.prod.outlook.com>
2012-12-15 13:56 ` Gilles Chanteperdrix
2012-12-15 14:06 ` Gilles Chanteperdrix
2012-12-15 14:42 ` GUGLIELMO NAVARRA
2012-12-15 14:50 ` Gilles Chanteperdrix [this message]
2012-12-15 14:54 ` Gilles Chanteperdrix
[not found] ` <7385E066AECB78449EEDFA7EE2A2B2B60A052E0D@DB3PRD0410MB355.eurprd04.prod.outlook.com>
2012-12-15 15:59 ` Gilles Chanteperdrix
2012-12-15 12:35 ` Gilles Chanteperdrix
-- strict thread matches above, loose matches on Subject: below --
2012-12-15 15:47 GUGLIELMO NAVARRA
2012-12-15 15:56 ` GUGLIELMO NAVARRA
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