diff for duplicates of <50D2F61E.10900@arm.com> diff --git a/a/1.txt b/N1/1.txt index 2ee4762..3082486 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ On 20/12/12 09:44, Hiroshi Doyu wrote: > Initial support for Tegra 114 SoC. This is expected to be included in > the board DTS files, Tegra 114 SoC based evaluation board family. > -> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> You definitely need to add some cpu nodes here, or get someone to merge the NR_CPUS=0 patch: https://lkml.org/lkml/2012/3/31/131 @@ -38,7 +38,7 @@ regions, as well as the VGIC maintenance interrupt? > + #interrupt-cells = <3>; > + }; > + -> + timer@60005000 { +> + timer at 60005000 { > + compatible = "nvidia,tegra114-timer", "nvidia,tegra20-timer"; > + reg = <0x60005000 0x400>; > + interrupts = <0 0 0x04 @@ -49,7 +49,7 @@ regions, as well as the VGIC maintenance interrupt? > + 0 122 0x04>; > + }; > + -> + serial@70006000 { +> + serial at 70006000 { > + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; > + reg = <0x70006000 0x40>; > + reg-shift = <2>; @@ -57,7 +57,7 @@ regions, as well as the VGIC maintenance interrupt? > + status = "disabled"; > + }; > + -> + serial@70006040 { +> + serial at 70006040 { > + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; > + reg = <0x70006040 0x40>; > + reg-shift = <2>; @@ -65,7 +65,7 @@ regions, as well as the VGIC maintenance interrupt? > + status = "disabled"; > + }; > + -> + serial@70006200 { +> + serial at 70006200 { > + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; > + reg = <0x70006200 0x100>; > + reg-shift = <2>; @@ -73,7 +73,7 @@ regions, as well as the VGIC maintenance interrupt? > + status = "disabled"; > + }; > + -> + serial@70006300 { +> + serial at 70006300 { > + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; > + reg = <0x70006300 0x100>; > + reg-shift = <2>; @@ -81,7 +81,7 @@ regions, as well as the VGIC maintenance interrupt? > + status = "disabled"; > + }; > + -> + serial@70006400 { +> + serial at 70006400 { > + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; > + reg = <0x70006400 0x100>; > + reg-shift = <2>; diff --git a/a/content_digest b/N1/content_digest index aae9d60..c21b4d3 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,28 +1,16 @@ "ref\01355996654-6579-1-git-send-email-hdoyu@nvidia.com\0" "ref\01355996654-6579-7-git-send-email-hdoyu@nvidia.com\0" - "ref\01355996654-6579-7-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>\0" - "Subject\0Re: [PATCH 6/9] ARM: dt: tegra114: Add new SoC base, Tegra 114 SoC\0" + "From\0marc.zyngier@arm.com (Marc Zyngier)\0" + "Subject\0[PATCH 6/9] ARM: dt: tegra114: Add new SoC base, Tegra 114 SoC\0" "Date\0Thu, 20 Dec 2012 11:27:26 +0000\0" - "To\0Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" - Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org> - John Stultz <johnstul-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org> - devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org <devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org> - linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> - Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org> - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 20/12/12 09:44, Hiroshi Doyu wrote:\n" "> Initial support for Tegra 114 SoC. This is expected to be included in\n" "> the board DTS files, Tegra 114 SoC based evaluation board family.\n" "> \n" - "> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>\n" "\n" "You definitely need to add some cpu nodes here, or get someone to merge\n" "the NR_CPUS=0 patch: https://lkml.org/lkml/2012/3/31/131\n" @@ -58,7 +46,7 @@ "> +\t\t#interrupt-cells = <3>;\n" "> +\t};\n" "> +\n" - "> +\ttimer@60005000 {\n" + "> +\ttimer at 60005000 {\n" "> +\t\tcompatible = \"nvidia,tegra114-timer\", \"nvidia,tegra20-timer\";\n" "> +\t\treg = <0x60005000 0x400>;\n" "> +\t\tinterrupts = <0 0 0x04\n" @@ -69,7 +57,7 @@ "> +\t\t\t 0 122 0x04>;\n" "> +\t};\n" "> +\n" - "> +\tserial@70006000 {\n" + "> +\tserial at 70006000 {\n" "> +\t\tcompatible = \"nvidia,tegra114-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006000 0x40>;\n" "> +\t\treg-shift = <2>;\n" @@ -77,7 +65,7 @@ "> +\t\tstatus = \"disabled\";\n" "> +\t};\n" "> +\n" - "> +\tserial@70006040 {\n" + "> +\tserial at 70006040 {\n" "> +\t\tcompatible = \"nvidia,tegra114-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006040 0x40>;\n" "> +\t\treg-shift = <2>;\n" @@ -85,7 +73,7 @@ "> +\t\tstatus = \"disabled\";\n" "> +\t};\n" "> +\n" - "> +\tserial@70006200 {\n" + "> +\tserial at 70006200 {\n" "> +\t\tcompatible = \"nvidia,tegra114-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006200 0x100>;\n" "> +\t\treg-shift = <2>;\n" @@ -93,7 +81,7 @@ "> +\t\tstatus = \"disabled\";\n" "> +\t};\n" "> +\n" - "> +\tserial@70006300 {\n" + "> +\tserial at 70006300 {\n" "> +\t\tcompatible = \"nvidia,tegra114-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006300 0x100>;\n" "> +\t\treg-shift = <2>;\n" @@ -101,7 +89,7 @@ "> +\t\tstatus = \"disabled\";\n" "> +\t};\n" "> +\n" - "> +\tserial@70006400 {\n" + "> +\tserial at 70006400 {\n" "> +\t\tcompatible = \"nvidia,tegra114-uart\", \"nvidia,tegra20-uart\";\n" "> +\t\treg = <0x70006400 0x100>;\n" "> +\t\treg-shift = <2>;\n" @@ -139,4 +127,4 @@ "-- \n" Jazz is not dead. It just smells funny... -cf3c71736f1a16815a080f9a2eb976582ce182fe69dab5f2fa2144237fedcd9d +e03273e57eda900d8e37a80ff852c3aa417cfe2364d0028fdc0f8537af2e167f
diff --git a/a/1.txt b/N2/1.txt index 2ee4762..ee2f5b0 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -2,7 +2,7 @@ On 20/12/12 09:44, Hiroshi Doyu wrote: > Initial support for Tegra 114 SoC. This is expected to be included in > the board DTS files, Tegra 114 SoC based evaluation board family. > -> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> You definitely need to add some cpu nodes here, or get someone to merge the NR_CPUS=0 patch: https://lkml.org/lkml/2012/3/31/131 diff --git a/a/content_digest b/N2/content_digest index aae9d60..a54e363 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,28 +1,27 @@ "ref\01355996654-6579-1-git-send-email-hdoyu@nvidia.com\0" "ref\01355996654-6579-7-git-send-email-hdoyu@nvidia.com\0" - "ref\01355996654-6579-7-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>\0" + "From\0Marc Zyngier <marc.zyngier@arm.com>\0" "Subject\0Re: [PATCH 6/9] ARM: dt: tegra114: Add new SoC base, Tegra 114 SoC\0" "Date\0Thu, 20 Dec 2012 11:27:26 +0000\0" - "To\0Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" - Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org> - John Stultz <johnstul-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org> - devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org <devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org> - linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> - Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org> - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" + "To\0Hiroshi Doyu <hdoyu@nvidia.com>\0" + "Cc\0linux-tegra@vger.kernel.org <linux-tegra@vger.kernel.org>" + Andrew Lunn <andrew@lunn.ch> + Russell King <linux@arm.linux.org.uk> + Jason Cooper <jason@lakedaemon.net> + John Stultz <johnstul@us.ibm.com> + devicetree-discuss@lists.ozlabs.org <devicetree-discuss@lists.ozlabs.org> + linux-doc@vger.kernel.org <linux-doc@vger.kernel.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + rob.herring@calxeda.com <rob.herring@calxeda.com> + Thomas Gleixner <tglx@linutronix.de> + " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" "\00:1\0" "b\0" "On 20/12/12 09:44, Hiroshi Doyu wrote:\n" "> Initial support for Tegra 114 SoC. This is expected to be included in\n" "> the board DTS files, Tegra 114 SoC based evaluation board family.\n" "> \n" - "> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>\n" "\n" "You definitely need to add some cpu nodes here, or get someone to merge\n" "the NR_CPUS=0 patch: https://lkml.org/lkml/2012/3/31/131\n" @@ -139,4 +138,4 @@ "-- \n" Jazz is not dead. It just smells funny... -cf3c71736f1a16815a080f9a2eb976582ce182fe69dab5f2fa2144237fedcd9d +818da560911f29500569709992038cebbac08cc531170839cbb9ecdfedd476ad
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