From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45967) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TruoO-0000Mc-U0 for qemu-devel@nongnu.org; Sun, 06 Jan 2013 13:19:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TruoN-0006iM-Cx for qemu-devel@nongnu.org; Sun, 06 Jan 2013 13:19:08 -0500 Received: from cantor2.suse.de ([195.135.220.15]:54912 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TruoN-0006i7-3C for qemu-devel@nongnu.org; Sun, 06 Jan 2013 13:19:07 -0500 Message-ID: <50E9C014.2060508@suse.de> Date: Sun, 06 Jan 2013 19:19:00 +0100 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1357287364-24921-1-git-send-email-kraxel@redhat.com> <1357287364-24921-4-git-send-email-kraxel@redhat.com> In-Reply-To: <1357287364-24921-4-git-send-email-kraxel@redhat.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 3/4] hw: Add test device for unittests execution List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann , Lucas Meneghel Rodrigues Cc: Marcelo Tosatti , qemu-devel@nongnu.org, Alexander Graf , Blue Swirl , Anthony Liguori , Paolo Bonzini Am 04.01.2013 09:16, schrieb Gerd Hoffmann: > From: Lucas Meneghel Rodrigues >=20 > Add a test device which supports the kvmctl ioports, > so one can run the KVM unittest suite. >=20 > Intended Usage: >=20 > qemu-system-x86_64 -nographic \ > -device pc-testdev \ > -device isa-debug-exit,iobase=3D0xf4,iosize=3D0x04 \ > -kernel /path/to/kvm/unittests/msr.flat >=20 > Where msr.flat is one of the KVM unittests, present on a > separate repo, >=20 > git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git >=20 > [ kraxel: more memory api + qom fixes ] >=20 > CC: Paolo Bonzini > Signed-off-by: Alexander Graf > Signed-off-by: Marcelo Tosatti > Signed-off-by: Lucas Meneghel Rodrigues > Signed-off-by: Gerd Hoffmann [...] > diff --git a/hw/pc-testdev.c b/hw/pc-testdev.c > new file mode 100644 > index 0000000..620c86c > --- /dev/null > +++ b/hw/pc-testdev.c [...] > +typedef struct PCTestdev { > + ISADevice parent_obj; > + > + MemoryRegion ioport; > + MemoryRegion flush; > + MemoryRegion irq; > + MemoryRegion iomem; > + uint32_t ioport_data; > + char iomem_buf[IOMEM_LEN]; > +} PCTestdev; > + > +#define TYPE_TESTDEV "pc-testdev" > +#define TESTDEV(obj) \ > + OBJECT_CHECK(struct PCTestdev, (obj), TYPE_TESTDEV) You define a typedef above but ignore it here and everywhere below. I'm surprised that Anthony didn't complain - struct is an implementation detail of today's QOM classes in lack of C++/etc. language support, and even qdev used the typedefs. Lucas/Gerd, can one of you please clean this up in a follow-up? I only noticed this because I had to touch some of these lines rebasing my ISA QOM realize queue - maybe some Perl wizard can add a checkpatch.pl rule to catch this? Thanks, Andreas > + > +static void test_irq_line(void *opaque, hwaddr addr, uint64_t data, > + unsigned len) > +{ > + struct PCTestdev *dev =3D opaque; > + struct ISADevice *isa =3D ISA_DEVICE(dev); > + > + qemu_set_irq(isa_get_irq(isa, addr), !!data); > +} > + > +static const MemoryRegionOps test_irq_ops =3D { > + .write =3D test_irq_line, > + .valid.min_access_size =3D 1, > + .valid.max_access_size =3D 1, > + .endianness =3D DEVICE_LITTLE_ENDIAN, > +}; > + > +static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data= , > + unsigned len) > +{ > + struct PCTestdev *dev =3D opaque; > + dev->ioport_data =3D data; > +} > + > +static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned l= en) > +{ > + struct PCTestdev *dev =3D opaque; > + return dev->ioport_data; > +} > + > +static const MemoryRegionOps test_ioport_ops =3D { > + .read =3D test_ioport_read, > + .write =3D test_ioport_write, > + .endianness =3D DEVICE_LITTLE_ENDIAN, > +}; > + > +static void test_flush_page(void *opaque, hwaddr addr, uint64_t data, > + unsigned len) > +{ > + hwaddr page =3D 4096; > + void *a =3D cpu_physical_memory_map(data & ~0xffful, &page, 0); > + > + /* We might not be able to get the full page, only mprotect what w= e actually > + have mapped */ > + mprotect(a, page, PROT_NONE); > + mprotect(a, page, PROT_READ|PROT_WRITE); > + cpu_physical_memory_unmap(a, page, 0, 0); > +} > + > +static const MemoryRegionOps test_flush_ops =3D { > + .write =3D test_flush_page, > + .valid.min_access_size =3D 4, > + .valid.max_access_size =3D 4, > + .endianness =3D DEVICE_LITTLE_ENDIAN, > +}; > + > +static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned le= n) > +{ > + struct PCTestdev *dev =3D opaque; > + uint64_t ret =3D 0; > + memcpy(&ret, &dev->iomem_buf[addr], len); > + ret =3D le64_to_cpu(ret); > + > + return ret; > +} > + > +static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val, > + unsigned len) > +{ > + struct PCTestdev *dev =3D opaque; > + val =3D cpu_to_le64(val); > + memcpy(&dev->iomem_buf[addr], &val, len); > + dev->iomem_buf[addr] =3D val; > +} > + > +static const MemoryRegionOps test_iomem_ops =3D { > + .read =3D test_iomem_read, > + .write =3D test_iomem_write, > + .endianness =3D DEVICE_LITTLE_ENDIAN, > +}; > + > +static int init_test_device(ISADevice *isa) > +{ > + struct PCTestdev *dev =3D TESTDEV(isa); > + MemoryRegion *mem =3D isa_address_space(isa); > + MemoryRegion *io =3D isa_address_space_io(isa); > + > + memory_region_init_io(&dev->ioport, &test_ioport_ops, dev, > + "pc-testdev-ioport", 4); > + memory_region_init_io(&dev->flush, &test_flush_ops, dev, > + "pc-testdev-flush-page", 4); > + memory_region_init_io(&dev->irq, &test_irq_ops, dev, > + "pc-testdev-irq-line", 24); > + memory_region_init_io(&dev->iomem, &test_iomem_ops, dev, > + "pc-testdev-iomem", IOMEM_LEN); > + > + memory_region_add_subregion(io, 0xe0, &dev->ioport); > + memory_region_add_subregion(io, 0xe4, &dev->flush); > + memory_region_add_subregion(io, 0x2000, &dev->irq); > + memory_region_add_subregion(mem, 0xff000000, &dev->iomem); > + > + return 0; > +} > + > +static void testdev_class_init(ObjectClass *klass, void *data) > +{ > + ISADeviceClass *k =3D ISA_DEVICE_CLASS(klass); > + > + k->init =3D init_test_device; > +} > + > +static TypeInfo testdev_info =3D { static const > + .name =3D TYPE_TESTDEV, > + .parent =3D TYPE_ISA_DEVICE, > + .instance_size =3D sizeof(struct PCTestdev), > + .class_init =3D testdev_class_init, > +}; > + > +static void testdev_register_types(void) > +{ > + type_register_static(&testdev_info); > +} > + > +type_init(testdev_register_types) --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg