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Message-ID: <50F0126B.6080106@codesourcery.com>
Date: Fri, 11 Jan 2013 14:23:55 +0100
From: Tom de Vries <vries@codesourcery.com>
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Subject: [Qemu-devel] [PATCH 02/14] target-mips: use the
 softfloat	floatXX_muladd functions
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To: aurelien@aurel32.net
Cc: qemu-devel@nongnu.org, Richard Henderson <rth@redhat.com>

Aurelien,

> @@ -8307,7 +8307,7 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t 
> opc,
>              gen_load_fpr64(ctx, fp0, fs);
>              gen_load_fpr64(ctx, fp1, ft);
>              gen_load_fpr64(ctx, fp2, fr);
> -            gen_helper_float_muladd_d(fp2, cpu_env, fp0, fp1, fp2);
> +            gen_helper_float_madd_d(fp2, cpu_env, fp0, fp1, fp2);
>              tcg_temp_free_i64(fp0);
>              tcg_temp_free_i64(fp1);
>              gen_store_fpr64(ctx, fp2, fd);

AFAIU:
- you're replacing here a non-fused mAC with a fused MAC and
- for all mips cores (except the r8000) the madd.d is non-fused.
So shouldn't we use a non-fused MAC here?

Thanks,
- Tom