From: Richard Henderson <rth@twiddle.net>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: Torbjorn Granlund <tg@gmplib.org>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] 3 new x86 instructions
Date: Sat, 12 Jan 2013 11:02:17 -0800 [thread overview]
Message-ID: <50F1B339.9010709@twiddle.net> (raw)
In-Reply-To: <CAAu8pHtnUF7pjY1sdsbv=4_YvGoqO5oH6RfH2PKM7Ms6bgrK_w@mail.gmail.com>
On 01/12/2013 03:40 AM, Blue Swirl wrote:
> MULX implies a bunch of other instructions due to CPUID flag grouping.
> ADCX and ADOX can be implemented separately. None of these and the
> other instructions in the MULX group look very complex.
I've got a patch for (most of?) the bmi[12] insns:
git://repo.or.cz/qemu/rth.git x86-next
This includes general support for the VEX prefixes.
But before I did anything else for the adx extension,
I thought I'd have a look back at Paolo's eflags optimization
patch series that he posted in October. Otherwise we'll
not be able to get really good emulation of these insns.
r~
next prev parent reply other threads:[~2013-01-12 19:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-10 13:46 [Qemu-devel] 3 new x86 instructions Torbjorn Granlund
2013-01-12 11:40 ` Blue Swirl
2013-01-12 15:09 ` Torbjorn Granlund
2013-01-12 19:02 ` Richard Henderson [this message]
2013-01-14 18:14 ` Torbjorn Granlund
2013-01-14 18:46 ` Richard Henderson
2013-01-15 17:14 ` Torbjorn Granlund
2013-01-15 17:17 ` Richard Henderson
2013-01-16 20:38 ` Torbjorn Granlund
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