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From: Laszlo Ersek <lersek@redhat.com>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	akong@redhat.com, qemu-devel@nongnu.org,
	Stefan Hajnoczi <stefanha@redhat.com>
Subject: Re: [Qemu-devel] [RFC PATCH] PIIX: reset the VM when the Reset Control Register's RCPU bit gets set
Date: Mon, 14 Jan 2013 18:54:40 +0100	[thread overview]
Message-ID: <50F44660.7010904@redhat.com> (raw)
In-Reply-To: <50F43AD3.5030604@redhat.com>

On 01/14/13 18:05, Laszlo Ersek wrote:

> I guess I could try to implement the subregion by open-coding the
> memory_region_init_io() and sysbus_add_io() functions and overriding as
> needed, but it seems like a mess. (Which is of course caused by this
> impossible hack of PIIX4 that places the reset control register inside
> the PCI config index register! The IO port 0xcf9 actually has double
> purpose, and it doesn't depend on any kind of "mapping".)

After looking again at the docs, I'm now trying to add a generic region
first (a container), and then, as its children, pci-conf-idx and rcr as
two sibling regions. The docs suggest siblings can overlap.

Thanks
Laszlo

      reply	other threads:[~2013-01-14 17:53 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-08 21:44 [Qemu-devel] [RFC PATCH] PIIX: reset the VM when the Reset Control Register's RCPU bit gets set Laszlo Ersek
2013-01-09 21:01 ` Blue Swirl
2013-01-11  9:30   ` Laszlo Ersek
2013-01-11 12:10     ` Andreas Färber
2013-01-11 12:20   ` Laszlo Ersek
2013-01-12 12:13     ` Blue Swirl
2013-01-14 17:05       ` Laszlo Ersek
2013-01-14 17:54         ` Laszlo Ersek [this message]

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