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diff for duplicates of <50FEC503.2080602@wwwdotorg.org>

diff --git a/a/1.txt b/N1/1.txt
index 8bf7589..21e6660 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -2,7 +2,7 @@ On 01/21/2013 11:07 PM, Santosh Shilimkar wrote:
 > On Tuesday 22 January 2013 11:22 AM, Hiroshi Doyu wrote:
 >> Skip scu_enable(scu_base) if CPU is not Cortex A9 with SCU.
 >>
->> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+>> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
 >> ---
 > Looks fine. I will also update OMAP code with the new
 > interface. Thanks.
@@ -18,6 +18,6 @@ Hiroshi, is this series the only dependency you need for your Tegra114
 series? So, I could merge your Tegra114 series once this series is applied?
 
 > For the patch,
-> Acked-by: Santosh Shilimkar<santosh.shilimkar-l0cyMroinI0@public.gmane.org>
+> Acked-by: Santosh Shilimkar<santosh.shilimkar@ti.com>
 
 Thanks.
diff --git a/a/content_digest b/N1/content_digest
index 983690e..8d8cd72 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,25 +1,17 @@
  "ref\01358833924-24535-1-git-send-email-hdoyu@nvidia.com\0"
  "ref\01358833924-24535-2-git-send-email-hdoyu@nvidia.com\0"
  "ref\050FE2CA8.20100@ti.com\0"
- "ref\050FE2CA8.20100-l0cyMroinI0@public.gmane.org\0"
- "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0"
- "Subject\0Re: [v3 2/2] ARM: tegra: Skip scu_enable(scu_base) if not Cortex A9\0"
+ "From\0swarren@wwwdotorg.org (Stephen Warren)\0"
+ "Subject\0[v3 2/2] ARM: tegra: Skip scu_enable(scu_base) if not Cortex A9\0"
  "Date\0Tue, 22 Jan 2013 09:57:39 -0700\0"
- "To\0Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>"
- " Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
- "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
-  arnd-r2nGTMty4D4@public.gmane.org
-  olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org
-  Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On 01/21/2013 11:07 PM, Santosh Shilimkar wrote:\n"
  "> On Tuesday 22 January 2013 11:22 AM, Hiroshi Doyu wrote:\n"
  ">> Skip scu_enable(scu_base) if CPU is not Cortex A9 with SCU.\n"
  ">>\n"
- ">> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ ">> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>\n"
  ">> ---\n"
  "> Looks fine. I will also update OMAP code with the new\n"
  "> interface. Thanks.\n"
@@ -35,8 +27,8 @@
  "series? So, I could merge your Tegra114 series once this series is applied?\n"
  "\n"
  "> For the patch,\n"
- "> Acked-by: Santosh Shilimkar<santosh.shilimkar-l0cyMroinI0@public.gmane.org>\n"
+ "> Acked-by: Santosh Shilimkar<santosh.shilimkar@ti.com>\n"
  "\n"
  Thanks.
 
-973042d8f5f5cf92986ac096c96a8d01630aade53614d6888baf8ad67f724f7d
+44fb0178d09189a778b5da0138715dd1b7081abfbdb913ff82bce362531ce7b1

diff --git a/a/1.txt b/N2/1.txt
index 8bf7589..21e6660 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -2,7 +2,7 @@ On 01/21/2013 11:07 PM, Santosh Shilimkar wrote:
 > On Tuesday 22 January 2013 11:22 AM, Hiroshi Doyu wrote:
 >> Skip scu_enable(scu_base) if CPU is not Cortex A9 with SCU.
 >>
->> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+>> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
 >> ---
 > Looks fine. I will also update OMAP code with the new
 > interface. Thanks.
@@ -18,6 +18,6 @@ Hiroshi, is this series the only dependency you need for your Tegra114
 series? So, I could merge your Tegra114 series once this series is applied?
 
 > For the patch,
-> Acked-by: Santosh Shilimkar<santosh.shilimkar-l0cyMroinI0@public.gmane.org>
+> Acked-by: Santosh Shilimkar<santosh.shilimkar@ti.com>
 
 Thanks.
diff --git a/a/content_digest b/N2/content_digest
index 983690e..7028dce 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,25 +1,24 @@
  "ref\01358833924-24535-1-git-send-email-hdoyu@nvidia.com\0"
  "ref\01358833924-24535-2-git-send-email-hdoyu@nvidia.com\0"
  "ref\050FE2CA8.20100@ti.com\0"
- "ref\050FE2CA8.20100-l0cyMroinI0@public.gmane.org\0"
- "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0"
+ "From\0Stephen Warren <swarren@wwwdotorg.org>\0"
  "Subject\0Re: [v3 2/2] ARM: tegra: Skip scu_enable(scu_base) if not Cortex A9\0"
  "Date\0Tue, 22 Jan 2013 09:57:39 -0700\0"
- "To\0Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>"
- " Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
- "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
-  arnd-r2nGTMty4D4@public.gmane.org
-  olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org
-  Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
+ "To\0Santosh Shilimkar <santosh.shilimkar@ti.com>"
+ " Hiroshi Doyu <hdoyu@nvidia.com>\0"
+ "Cc\0linux-arm-kernel@lists.infradead.org"
+  arnd@arndb.de
+  olof@lixom.net
+  Russell King <linux@arm.linux.org.uk>
+  linux-kernel@vger.kernel.org
+ " linux-tegra@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "On 01/21/2013 11:07 PM, Santosh Shilimkar wrote:\n"
  "> On Tuesday 22 January 2013 11:22 AM, Hiroshi Doyu wrote:\n"
  ">> Skip scu_enable(scu_base) if CPU is not Cortex A9 with SCU.\n"
  ">>\n"
- ">> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ ">> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>\n"
  ">> ---\n"
  "> Looks fine. I will also update OMAP code with the new\n"
  "> interface. Thanks.\n"
@@ -35,8 +34,8 @@
  "series? So, I could merge your Tegra114 series once this series is applied?\n"
  "\n"
  "> For the patch,\n"
- "> Acked-by: Santosh Shilimkar<santosh.shilimkar-l0cyMroinI0@public.gmane.org>\n"
+ "> Acked-by: Santosh Shilimkar<santosh.shilimkar@ti.com>\n"
  "\n"
  Thanks.
 
-973042d8f5f5cf92986ac096c96a8d01630aade53614d6888baf8ad67f724f7d
+93f56955b61c59cc759b4fab372a0c23f6ac5fc9196d274d50464a44c01be028

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