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Thu, 25 Jan 2024 07:43:15 -0800 (PST) Message-ID: <50e79338-b2fd-40e9-b754-4e725e27ceb3@suse.com> Date: Thu, 25 Jan 2024 16:43:11 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v12 10/15] vpci/header: emulate PCI_COMMAND register for guests Content-Language: en-US To: Stewart Hildebrand Cc: Oleksandr Andrushchenko , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Andrew Cooper , George Dunlap , Julien Grall , Stefano Stabellini , Wei Liu , Volodymyr Babchuk , xen-devel@lists.xenproject.org References: <20240109215145.430207-1-stewart.hildebrand@amd.com> <20240109215145.430207-11-stewart.hildebrand@amd.com> From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20240109215145.430207-11-stewart.hildebrand@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 09.01.2024 22:51, Stewart Hildebrand wrote: > --- a/xen/drivers/vpci/header.c > +++ b/xen/drivers/vpci/header.c > @@ -168,6 +168,9 @@ static void modify_decoding(const struct pci_dev *pdev, uint16_t cmd, > if ( !rom_only ) > { > pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); > + /* Show DomU that we updated P2M */ > + header->guest_cmd &= ~PCI_COMMAND_MEMORY; > + header->guest_cmd |= cmd & PCI_COMMAND_MEMORY; > header->bars_mapped = map; > } I don't follow what the comment means to say. The bit in question has no real connection to the P2M, and the guest also may have no notion of the underlying hypervisor's internals. Likely connected to ... > @@ -524,9 +527,26 @@ static void cf_check cmd_write( > { > struct vpci_header *header = data; > > + if ( !is_hardware_domain(pdev->domain) ) > + { > + const struct vpci *vpci = pdev->vpci; > + > + if ( (vpci->msi && vpci->msi->enabled) || > + (vpci->msix && vpci->msix->enabled) ) > + cmd |= PCI_COMMAND_INTX_DISABLE; > + > + /* > + * Do not show change to PCI_COMMAND_MEMORY bit until we finish > + * modifying P2M mappings. > + */ > + header->guest_cmd = (cmd & ~PCI_COMMAND_MEMORY) | > + (header->guest_cmd & PCI_COMMAND_MEMORY); > + } ... the comment here, but then shouldn't it be that the guest can't even issue a 2nd cfg space access until the present write has been carried out? Otherwise I'd be inclined to claim that such a partial update is unlikely to be spec-conformant. > @@ -843,6 +885,15 @@ static int cf_check init_header(struct pci_dev *pdev) > if ( cmd & PCI_COMMAND_MEMORY ) > pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd & ~PCI_COMMAND_MEMORY); > > + /* > + * Clear PCI_COMMAND_MEMORY and PCI_COMMAND_IO for DomUs, so they will > + * always start with memory decoding disabled and to ensure that we will not > + * call modify_bars() at the end of this function. > + */ > + if ( !is_hwdom ) > + cmd &= ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO); > + header->guest_cmd = cmd; With PCI_COMMAND_MEMORY clear, the hw reg won't further be written on the success return path. Yet wouldn't we better clear PCI_COMMAND_IO also in hardware (until we properly support it)? I also think the insertion point for the new code isn't well chosen: The comment just out of context indicates that the code in context above is connected to the subsequent code. Whereas the addition is not. > --- a/xen/drivers/vpci/msi.c > +++ b/xen/drivers/vpci/msi.c > @@ -70,6 +70,15 @@ static void cf_check control_write( > > if ( vpci_msi_arch_enable(msi, pdev, vectors) ) > return; > + > + /* > + * Make sure domU doesn't enable INTx while enabling MSI. > + */ Nit: This ought to be a single line comment, just like ... > + if ( !is_hardware_domain(pdev->domain) ) > + { > + pci_intx(pdev, false); > + pdev->vpci->header.guest_cmd |= PCI_COMMAND_INTX_DISABLE; > + } > } > else > vpci_msi_arch_disable(msi, pdev); > --- a/xen/drivers/vpci/msix.c > +++ b/xen/drivers/vpci/msix.c > @@ -135,6 +135,13 @@ static void cf_check control_write( > } > } > > + /* Make sure domU doesn't enable INTx while enabling MSI-X. */ > + if ( new_enabled && !msix->enabled && !is_hardware_domain(pdev->domain) ) > + { > + pci_intx(pdev, false); > + pdev->vpci->header.guest_cmd |= PCI_COMMAND_INTX_DISABLE; > + } ... the similar code here has it. In both cases, is it really appropriate to set the bit in guest view? Jan