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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48e8f3e7829sm29426115e9.4.2026.05.12.07.11.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 12 May 2026 07:11:02 -0700 (PDT) Message-ID: <5101bb04-8acf-4d3b-8db6-701d7c41d5c2@redhat.com> Date: Tue, 12 May 2026 16:11:00 +0200 Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Reply-To: eric.auger@redhat.com Subject: Re: [PATCH v4 03/17] target/arm/cpu-sysregs.h.inc: Update with automatic generation To: Shameer Kolothum Thodi , "eric.auger.pro@gmail.com" , "qemu-devel@nongnu.org" , "qemu-arm@nongnu.org" , "kvmarm@lists.linux.dev" , "peter.maydell@linaro.org" , "richard.henderson@linaro.org" , "cohuck@redhat.com" , "sebott@redhat.com" , "philmd@linaro.org" Cc: "maz@kernel.org" , "oliver.upton@linux.dev" , "pbonzini@redhat.com" , "armbru@redhat.com" , "berrange@redhat.com" , "abologna@redhat.com" , "jdenemar@redhat.com" References: <20260503073541.790215-1-eric.auger@redhat.com> <20260503073541.790215-4-eric.auger@redhat.com> From: Eric Auger In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: kmAgAIMv6SXEMTZCbbI_Yx4z1pLltipy5ozvgyOPuG0_1778595063 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Shameer, On 5/12/26 11:41 AM, Shameer Kolothum Thodi wrote: > >> -----Original Message----- >> From: Eric Auger >> Sent: 12 May 2026 07:39 >> To: Shameer Kolothum Thodi ; >> eric.auger.pro@gmail.com; qemu-devel@nongnu.org; qemu- >> arm@nongnu.org; kvmarm@lists.linux.dev; peter.maydell@linaro.org; >> richard.henderson@linaro.org; cohuck@redhat.com; sebott@redhat.com; >> philmd@linaro.org >> Cc: maz@kernel.org; oliver.upton@linux.dev; pbonzini@redhat.com; >> armbru@redhat.com; berrange@redhat.com; abologna@redhat.com; >> jdenemar@redhat.com >> Subject: Re: [PATCH v4 03/17] target/arm/cpu-sysregs.h.inc: Update with >> automatic generation >> > [...] > >>>> +DEF(MPIDR_EL1, 3, 0, 0, 0, 5) >>> Do we need MPIDR_EL1 as well? Is this considered as a feature ID >>> register and is writable? I don't think so. >> MPIDR_EL1 is part of the ID regs range defined in the kernel doc >> >> op0 = 3, op1 = {0,1,3}, crn = 0, crm within [0, 7], op2 within [0, 7] >> >> That's why the python script extracts it. Effectively it is not writable yet. >> >> I can exclude it from the automatic generation but do we really need to? Any >> specific reason? > No specific reason. The only thing is it's not really a feature ID register but > a topology register and is not writable now. I leave that to you. noted. I leave it as is for now and we will decide upon further reviews. Thanks Eric > > Thanks, > Shameer >