From mboxrd@z Thu Jan 1 00:00:00 1970 Message-ID: <51029170.7070104@siemens.com> Date: Fri, 25 Jan 2013 15:06:40 +0100 From: Jan Kiszka MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: [Xenomai] Lacking xsave support in Xenomai List-Id: Discussions about the Xenomai project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Xenomai Hi all, yesterday I pushed a fix to my for-upstream queue that properly disables all xsave-dependent CPU features (AVX/AVX2 namely). However, this is no real solution for us as it blocks a lot of acceleration potential on current Intel CPUs. Did anyone already look into this in more details? Is it just a matter of implementing the necessary context switching bits? Are there known pitfalls? Jan -- Siemens AG, Corporate Technology, CT RTC ITP SDP-DE Corporate Competence Center Embedded Linux