Re: [PATCH 2/2] clk: tegra: add ac97 controller clock

[Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]

On 01/28/2013 12:25 PM, Lucas Stach wrote:
> Am Montag, den 28.01.2013, 12:15 -0700 schrieb Stephen Warren:
>> On 01/27/2013 03:17 PM, Lucas Stach wrote:
>>> AC97 controller clock is hardwired to pll_a_out0.
>>
>> One more comment here; don't you need to add this clock into
>> audio_parents[]?
>>
> Yeah it's documented that AC97 can be used as audio_sync_clock, but for
> one I haven't tested this

I expect there are quite a few of the clock driver table entries that
aren't tested. I still think we should add them though, once the clocks
they refer to actually exist.

> and also ac97 clock == pll_a_out0, so you can
> just as well use the pll out in that case.

I suspect that "ac97 clock == pll_a_out0" isn't categorically true; it's
quite possible that the TRM simply doesn't document the mux
register/field for the ac97 clock since the ac97 module is considered
deprecated. The diagram at the end of section 5.2.3 "Audio Clocks"
certainly implies that all of the i2s*, spdifout, and ac97 clocks have
the same structure.