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From: Daniel Vetter <daniel.vetter@intel.com>
To: Jesse Barnes <jesse.barnes@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Cheah, Vincent Beng Keat" <vincent.beng.keat.cheah@intel.com>,
	"Ung, Teng En" <teng.en.ung@intel.com>,
	"Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>,
	"Widawsky, Benjamin" <benjamin.widawsky@intel.com>
Subject: Re: intel-gpu-tools patches for read/write MMIO
Date: Tue, 29 Jan 2013 21:15:22 +0100	[thread overview]
Message-ID: <51082DDA.60109@intel.com> (raw)
In-Reply-To: <20130129120109.75f85b33@jbarnes-t420>

On 29/01/2013 21:01, Jesse Barnes wrote:
> Can you just post them externally tointel-gfx@lists.freedesktop.org?
> It's best to use git send-email to do it, that way the changelogs are
> preserved and posted to the ml along with the patches.
Public intel-gfx is already on the cc list, just in case you get the 
urge to spill some secrets ;-)
> Not sure if there's a bunch of duplication between the two, but you
> could split them up a bit.
>
> I still don't like the idea of silently adding the display offset on
> vlv; these are just debug tools and the developer should get the
> absolute offset they asked for no matter what.
On that topic of silently adding display offset - with Ville's kernel 
work we'll have switched away completely from such tricks in the kernel. 
So I think i-g-t shouldn't automatically add the offset.

Which essentially just leaves us with intel_reg_dumper. Now for that I'm 
somewhat hopefully that we will be able to (eventually) dump registers 
using the bspec xml sources (there should be bspec xmls around for just 
the open-source approved parts). In the meantime, can't we just adjust 
the relevant offsets of the register blocks? IIrc their all somewhat 
usefully grouped together, so this would amount to adding a quick 
function to add the offset to a given table (put keep all the names) and 
then feed the adjusted table to the dumper functions ...
-Daniel
Intel Semiconductor AG
Registered No. 020.30.913.786-7
Registered Office: World Trade Center, Leutschenbachstrasse 95, 8050 Zurich, Switzerland

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  reply	other threads:[~2013-01-29 20:15 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <D4B999590D2ACC499FE6A1F7CF2D454AAA23F8@PGSMSX103.gar.corp.intel.com>
     [not found] ` <20130114073735.60c1f0c7@jbarnes-desktop>
     [not found]   ` <67A6A5BE6078AA49887BBA3935A429881D60A9@PGSMSX103.gar.corp.intel.com>
     [not found]     ` <CALNAZXqD3WLKa_L_z4RffCuTX0J8C28x2b1AjaFWwF=U29fwZA@mail.gmail.com>
     [not found]       ` <67A6A5BE6078AA49887BBA3935A429881D636B@PGSMSX103.gar.corp.intel.com>
     [not found]         ` <CALNAZXoC-Ss_2uxV+3Fc=SoStn+t_9pkBAdfMZ-ReVLHHGvu3g@mail.gmail.com>
2013-01-29  8:16           ` intel-gpu-tools patches for read/write MMIO Cheah, Vincent Beng Keat
2013-01-29 20:01             ` Jesse Barnes
2013-01-29 20:15               ` Daniel Vetter [this message]
2013-01-30  1:12                 ` Ben Widawsky
2013-01-30  1:39                   ` Teres Alexis, Alan Previn
2013-01-30  3:27                     ` Teres Alexis, Alan Previn
2013-01-30  3:39                       ` Ben Widawsky
2013-01-30 17:13                   ` Jesse Barnes
2013-01-30 17:25                     ` Daniel Vetter
2013-01-30 17:30                       ` Jesse Barnes
2013-01-30 17:52                         ` Ben Widawsky
2013-01-31  2:40                           ` Cheah, Vincent Beng Keat
2013-01-31  3:27                             ` Ben Widawsky

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