From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rhyland Klein Subject: Re: [PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114 Date: Fri, 1 Feb 2013 14:40:30 -0500 Message-ID: <510C1A2E.5010408@nvidia.com> References: <1359713962-16822-1-git-send-email-pdeschrijver@nvidia.com> <1359713962-16822-5-git-send-email-pdeschrijver@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1359713962-16822-5-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: "devicetree-discuss" To: Peter De Schrijver Cc: Russell King , "linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Rob Herring , Joseph Lo , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Mike Turquette , "devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org" , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" List-Id: linux-tegra@vger.kernel.org On 2/1/2013 5:18 AM, Peter De Schrijver wrote: > Tegra114 introduces new PLL types. This requires new clocktypes as well > as some new fields in the pll structure. > > Signed-off-by: Peter De Schrijver > --- > drivers/clk/tegra/clk-pll.c | 719 +++++++++++++++++++++++++++++++++++++++++++ > drivers/clk/tegra/clk.h | 47 +++ > 2 files changed, 766 insertions(+), 0 deletions(-) > > diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c > index 87d2f34..50114b7 100644 > --- a/drivers/clk/tegra/clk-pll.c > +++ b/drivers/clk/tegra/clk-pll.c > [snip] > +struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name, > + void __iomem *clk_base, void __iomem *pmc, > + unsigned long flags, unsigned long fixed_rate, > + struct tegra_clk_pll_params *pll_params, > + u32 pll_flags, > + struct tegra_clk_pll_freq_table *freq_table, > + spinlock_t *lock) > +{ > + if (!pll_params->pdiv_tohw) > + return -EINVAL; > + This will cause the following warning: warning: return makes pointer from integer without a cast Same with occurrences in tegra_clk_register_pllm and tegra_clk_register_pllc. Should this instead be returning NULL? -rhyland -- nvpublic From mboxrd@z Thu Jan 1 00:00:00 1970 From: rklein@nvidia.com (Rhyland Klein) Date: Fri, 1 Feb 2013 14:40:30 -0500 Subject: [PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114 In-Reply-To: <1359713962-16822-5-git-send-email-pdeschrijver@nvidia.com> References: <1359713962-16822-1-git-send-email-pdeschrijver@nvidia.com> <1359713962-16822-5-git-send-email-pdeschrijver@nvidia.com> Message-ID: <510C1A2E.5010408@nvidia.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2/1/2013 5:18 AM, Peter De Schrijver wrote: > Tegra114 introduces new PLL types. This requires new clocktypes as well > as some new fields in the pll structure. > > Signed-off-by: Peter De Schrijver > --- > drivers/clk/tegra/clk-pll.c | 719 +++++++++++++++++++++++++++++++++++++++++++ > drivers/clk/tegra/clk.h | 47 +++ > 2 files changed, 766 insertions(+), 0 deletions(-) > > diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c > index 87d2f34..50114b7 100644 > --- a/drivers/clk/tegra/clk-pll.c > +++ b/drivers/clk/tegra/clk-pll.c > [snip] > +struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name, > + void __iomem *clk_base, void __iomem *pmc, > + unsigned long flags, unsigned long fixed_rate, > + struct tegra_clk_pll_params *pll_params, > + u32 pll_flags, > + struct tegra_clk_pll_freq_table *freq_table, > + spinlock_t *lock) > +{ > + if (!pll_params->pdiv_tohw) > + return -EINVAL; > + This will cause the following warning: warning: return makes pointer from integer without a cast Same with occurrences in tegra_clk_register_pllm and tegra_clk_register_pllc. Should this instead be returning NULL? -rhyland -- nvpublic From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757140Ab3BATkn (ORCPT ); Fri, 1 Feb 2013 14:40:43 -0500 Received: from hqemgate04.nvidia.com ([216.228.121.35]:4986 "EHLO hqemgate04.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754566Ab3BATkl (ORCPT ); Fri, 1 Feb 2013 14:40:41 -0500 X-PGP-Universal: processed; by hqnvupgp06.nvidia.com on Fri, 01 Feb 2013 11:38:31 -0800 Message-ID: <510C1A2E.5010408@nvidia.com> Date: Fri, 1 Feb 2013 14:40:30 -0500 From: Rhyland Klein User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:17.0) Gecko/20130107 Thunderbird/17.0.2 MIME-Version: 1.0 To: Peter De Schrijver CC: Grant Likely , Rob Herring , Rob Landley , Stephen Warren , Russell King , Prashant Gaikwad , Simon Glass , Mike Turquette , Joseph Lo , "devicetree-discuss@lists.ozlabs.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-tegra@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114 References: <1359713962-16822-1-git-send-email-pdeschrijver@nvidia.com> <1359713962-16822-5-git-send-email-pdeschrijver@nvidia.com> In-Reply-To: <1359713962-16822-5-git-send-email-pdeschrijver@nvidia.com> Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/1/2013 5:18 AM, Peter De Schrijver wrote: > Tegra114 introduces new PLL types. This requires new clocktypes as well > as some new fields in the pll structure. > > Signed-off-by: Peter De Schrijver > --- > drivers/clk/tegra/clk-pll.c | 719 +++++++++++++++++++++++++++++++++++++++++++ > drivers/clk/tegra/clk.h | 47 +++ > 2 files changed, 766 insertions(+), 0 deletions(-) > > diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c > index 87d2f34..50114b7 100644 > --- a/drivers/clk/tegra/clk-pll.c > +++ b/drivers/clk/tegra/clk-pll.c > [snip] > +struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name, > + void __iomem *clk_base, void __iomem *pmc, > + unsigned long flags, unsigned long fixed_rate, > + struct tegra_clk_pll_params *pll_params, > + u32 pll_flags, > + struct tegra_clk_pll_freq_table *freq_table, > + spinlock_t *lock) > +{ > + if (!pll_params->pdiv_tohw) > + return -EINVAL; > + This will cause the following warning: warning: return makes pointer from integer without a cast Same with occurrences in tegra_clk_register_pllm and tegra_clk_register_pllc. Should this instead be returning NULL? -rhyland -- nvpublic