diff for duplicates of <510F56B1.5060409@nvidia.com> diff --git a/a/1.txt b/N1/1.txt index f8b6c5a..a7dbb0b 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,7 +3,7 @@ On Saturday 02 February 2013 01:10 AM, Rhyland Klein wrote: >> Tegra114 introduces new PLL types. This requires new clocktypes as well >> as some new fields in the pll structure. >> ->> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +>> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> >> --- >> drivers/clk/tegra/clk-pll.c | 719 +++++++++++++++++++++++++++++++++++++++++++ >> drivers/clk/tegra/clk.h | 47 +++ diff --git a/a/content_digest b/N1/content_digest index 93f173b..5483682 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,25 +1,10 @@ "ref\01359713962-16822-1-git-send-email-pdeschrijver@nvidia.com\0" "ref\01359713962-16822-5-git-send-email-pdeschrijver@nvidia.com\0" "ref\0510C1A2E.5010408@nvidia.com\0" - "ref\0510C1A2E.5010408-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Subject\0Re: [PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114\0" + "From\0pgaikwad@nvidia.com (Prashant Gaikwad)\0" + "Subject\0[PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114\0" "Date\0Mon, 4 Feb 2013 12:05:29 +0530\0" - "To\0Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" - Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> - Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> - Rob Landley <rob-VoJi6FS/r0vR7s880joybQ@public.gmane.org> - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> - Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org <devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org> - linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Saturday 02 February 2013 01:10 AM, Rhyland Klein wrote:\n" @@ -27,7 +12,7 @@ ">> Tegra114 introduces new PLL types. This requires new clocktypes as well\n" ">> as some new fields in the pll structure.\n" ">>\n" - ">> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + ">> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>\n" ">> ---\n" ">> drivers/clk/tegra/clk-pll.c | 719 +++++++++++++++++++++++++++++++++++++++++++\n" ">> drivers/clk/tegra/clk.h | 47 +++\n" @@ -63,4 +48,4 @@ "> -rhyland\n" > -a5b5c2e59bd899332da3b1cc265ad499975bc538532b0ce8e44a7ada5fb11fd9 +cdf49f50d14f551f6572452797a587d81ceec5741e08059928c590ff5e49a401
diff --git a/a/1.txt b/N2/1.txt index f8b6c5a..a7dbb0b 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -3,7 +3,7 @@ On Saturday 02 February 2013 01:10 AM, Rhyland Klein wrote: >> Tegra114 introduces new PLL types. This requires new clocktypes as well >> as some new fields in the pll structure. >> ->> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +>> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> >> --- >> drivers/clk/tegra/clk-pll.c | 719 +++++++++++++++++++++++++++++++++++++++++++ >> drivers/clk/tegra/clk.h | 47 +++ diff --git a/a/content_digest b/N2/content_digest index 93f173b..94d0126 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,25 +1,24 @@ "ref\01359713962-16822-1-git-send-email-pdeschrijver@nvidia.com\0" "ref\01359713962-16822-5-git-send-email-pdeschrijver@nvidia.com\0" "ref\0510C1A2E.5010408@nvidia.com\0" - "ref\0510C1A2E.5010408-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "From\0Prashant Gaikwad <pgaikwad@nvidia.com>\0" "Subject\0Re: [PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114\0" "Date\0Mon, 4 Feb 2013 12:05:29 +0530\0" - "To\0Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" - Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> - Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> - Rob Landley <rob-VoJi6FS/r0vR7s880joybQ@public.gmane.org> - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> - Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org <devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org> - linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0" + "To\0Rhyland Klein <rklein@nvidia.com>\0" + "Cc\0Peter De Schrijver <pdeschrijver@nvidia.com>" + Grant Likely <grant.likely@secretlab.ca> + Rob Herring <rob.herring@calxeda.com> + Rob Landley <rob@landley.net> + Stephen Warren <swarren@wwwdotorg.org> + Russell King <linux@arm.linux.org.uk> + Simon Glass <sjg@chromium.org> + Mike Turquette <mturquette@linaro.org> + Joseph Lo <josephl@nvidia.com> + devicetree-discuss@lists.ozlabs.org <devicetree-discuss@lists.ozlabs.org> + linux-doc@vger.kernel.org <linux-doc@vger.kernel.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + linux-tegra@vger.kernel.org <linux-tegra@vger.kernel.org> + " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" "\00:1\0" "b\0" "On Saturday 02 February 2013 01:10 AM, Rhyland Klein wrote:\n" @@ -27,7 +26,7 @@ ">> Tegra114 introduces new PLL types. This requires new clocktypes as well\n" ">> as some new fields in the pll structure.\n" ">>\n" - ">> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + ">> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>\n" ">> ---\n" ">> drivers/clk/tegra/clk-pll.c | 719 +++++++++++++++++++++++++++++++++++++++++++\n" ">> drivers/clk/tegra/clk.h | 47 +++\n" @@ -63,4 +62,4 @@ "> -rhyland\n" > -a5b5c2e59bd899332da3b1cc265ad499975bc538532b0ce8e44a7ada5fb11fd9 +890609fdadc0329b19b997f988785468c6b275ec3a45b98f421cee96c1a12da6
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