From mboxrd@z Thu Jan 1 00:00:00 1970 From: Prashant Gaikwad Subject: Re: [PATCH v5 09/10] clk: tegra: Implement clocks for Tegra114 Date: Tue, 5 Feb 2013 11:06:08 +0530 Message-ID: <51109A48.5000708@nvidia.com> References: <1359713962-16822-1-git-send-email-pdeschrijver@nvidia.com> <1359713962-16822-10-git-send-email-pdeschrijver@nvidia.com> <510F5E87.90801@nvidia.com> <20130204143401.GW2364@tbergstrom-lnx.Nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20130204143401.GW2364-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: "devicetree-discuss" To: Peter De Schrijver Cc: Russell King , "linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Rob Herring , Joseph Lo , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Mike Turquette , "devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org" , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" List-Id: linux-tegra@vger.kernel.org On Monday 04 February 2013 08:04 PM, Peter De Schrijver wrote: > On Mon, Feb 04, 2013 at 08:08:55AM +0100, Prashant Gaikwad wrote: >> On Friday 01 February 2013 03:48 PM, Peter De Schrijver wrote: > ... > >>> + /* xusb_hs_src */ >>> + val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC); >>> + val |= BIT(25); /* always select PLLU_60M */ >>> + writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC); >>> + >>> + clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0, >>> + 1, 1); >>> + clks[xusb_hs_src] = clk; >>> + >> With device tree we can directly use pll_u_60M, no need to register >> clock with fixed factor 1. >> Same comment for dis1-fixed, dsi2-fixed and mipi-cal-fast clocks. >> > Does it make sense to have separate DT IDs at all then? We can use same DT ID. > Cheers, > > Peter. From mboxrd@z Thu Jan 1 00:00:00 1970 From: pgaikwad@nvidia.com (Prashant Gaikwad) Date: Tue, 5 Feb 2013 11:06:08 +0530 Subject: [PATCH v5 09/10] clk: tegra: Implement clocks for Tegra114 In-Reply-To: <20130204143401.GW2364@tbergstrom-lnx.Nvidia.com> References: <1359713962-16822-1-git-send-email-pdeschrijver@nvidia.com> <1359713962-16822-10-git-send-email-pdeschrijver@nvidia.com> <510F5E87.90801@nvidia.com> <20130204143401.GW2364@tbergstrom-lnx.Nvidia.com> Message-ID: <51109A48.5000708@nvidia.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Monday 04 February 2013 08:04 PM, Peter De Schrijver wrote: > On Mon, Feb 04, 2013 at 08:08:55AM +0100, Prashant Gaikwad wrote: >> On Friday 01 February 2013 03:48 PM, Peter De Schrijver wrote: > ... > >>> + /* xusb_hs_src */ >>> + val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC); >>> + val |= BIT(25); /* always select PLLU_60M */ >>> + writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC); >>> + >>> + clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0, >>> + 1, 1); >>> + clks[xusb_hs_src] = clk; >>> + >> With device tree we can directly use pll_u_60M, no need to register >> clock with fixed factor 1. >> Same comment for dis1-fixed, dsi2-fixed and mipi-cal-fast clocks. >> > Does it make sense to have separate DT IDs at all then? We can use same DT ID. > Cheers, > > Peter. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754002Ab3BEFmy (ORCPT ); Tue, 5 Feb 2013 00:42:54 -0500 Received: from hqemgate03.nvidia.com ([216.228.121.140]:8772 "EHLO hqemgate03.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751768Ab3BEFmv (ORCPT ); Tue, 5 Feb 2013 00:42:51 -0500 X-PGP-Universal: processed; by hqnvupgp05.nvidia.com on Mon, 04 Feb 2013 21:36:16 -0800 Message-ID: <51109A48.5000708@nvidia.com> Date: Tue, 5 Feb 2013 11:06:08 +0530 From: Prashant Gaikwad User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:16.0) Gecko/20121011 Thunderbird/16.0.1 MIME-Version: 1.0 To: Peter De Schrijver CC: Grant Likely , Rob Herring , Rob Landley , Stephen Warren , Russell King , Simon Glass , Mike Turquette , Joseph Lo , "devicetree-discuss@lists.ozlabs.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-tegra@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH v5 09/10] clk: tegra: Implement clocks for Tegra114 References: <1359713962-16822-1-git-send-email-pdeschrijver@nvidia.com> <1359713962-16822-10-git-send-email-pdeschrijver@nvidia.com> <510F5E87.90801@nvidia.com> <20130204143401.GW2364@tbergstrom-lnx.Nvidia.com> In-Reply-To: <20130204143401.GW2364@tbergstrom-lnx.Nvidia.com> X-NVConfidentiality: public Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday 04 February 2013 08:04 PM, Peter De Schrijver wrote: > On Mon, Feb 04, 2013 at 08:08:55AM +0100, Prashant Gaikwad wrote: >> On Friday 01 February 2013 03:48 PM, Peter De Schrijver wrote: > ... > >>> + /* xusb_hs_src */ >>> + val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC); >>> + val |= BIT(25); /* always select PLLU_60M */ >>> + writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC); >>> + >>> + clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0, >>> + 1, 1); >>> + clks[xusb_hs_src] = clk; >>> + >> With device tree we can directly use pll_u_60M, no need to register >> clock with fixed factor 1. >> Same comment for dis1-fixed, dsi2-fixed and mipi-cal-fast clocks. >> > Does it make sense to have separate DT IDs at all then? We can use same DT ID. > Cheers, > > Peter.