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From: Jon Hunter <jon-hunter@ti.com>
To: Mark Jackson <mpfj-list@mimc.co.uk>
Cc: "linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>
Subject: Re: [PATCH] ARM: OMAP: Clear GPMC bits when applying new setting
Date: Wed, 6 Feb 2013 08:39:40 -0600	[thread overview]
Message-ID: <51126B2C.6080009@ti.com> (raw)
In-Reply-To: <51126586.9030308@mimc.co.uk>


On 02/06/2013 08:15 AM, Mark Jackson wrote:
> When setting the GPMC device type, make sure any previous
> bits are cleared down, before applying the new setting.
> 
> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
> ---
>  arch/arm/mach-omap2/gpmc.c |    4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
> index 1adb2d4..026e786 100644
> --- a/arch/arm/mach-omap2/gpmc.c
> +++ b/arch/arm/mach-omap2/gpmc.c
> @@ -613,6 +613,10 @@ int gpmc_cs_configure(int cs, int cmd, int wval)
> 
>  	case GPMC_CONFIG_DEV_TYPE:
>  		regval  = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
> +		/* clear 3 target bits */
> +		regval &= ~(GPMC_CONFIG1_DEVICETYPE(3) |
> +			    GPMC_CONFIG1_MUXADDDATA);

MUXADDDATA is actually a 2-bit field on current devices (OMAP4+ and
AM335x). For OMAP2/3 devices it was only a one bit field. So it may be
worth clearing both bits for all devices. For OMAP2 devices bit 8 is
reserved but the TRM says to writes a 0, so clearing bit 8 on OMAP2/3
devices should not be a problem. In fact bit 8 should read as 0 on OMAP2/3.

> +		/* set the proper value */
>  		regval |= GPMC_CONFIG1_DEVICETYPE(wval);
>  		if (wval == GPMC_DEVICETYPE_NOR)
>  			regval |= GPMC_CONFIG1_MUXADDDATA;
> 

Otherwise ...

Acked-by: Jon Hunter <jon-hunter@ti.com>

Cheers
Jon

  parent reply	other threads:[~2013-02-06 14:39 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-06 14:15 [PATCH] ARM: OMAP: Clear GPMC bits when applying new setting Mark Jackson
2013-02-06 14:32 ` Felipe Balbi
2013-02-06 14:39 ` Jon Hunter [this message]
2013-03-04 17:37   ` Tony Lindgren

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