From: jgd@neon-john.com (NeonJohn)
To: kernelnewbies@lists.kernelnewbies.org
Subject: Intro and some questions
Date: Sat, 23 Feb 2013 11:38:06 -0500 [thread overview]
Message-ID: <5128F06E.3060704@neon-john.com> (raw)
In-Reply-To: <CAK7N6vpieiTc8NfFEFih=35WX6zpr+fOr6h8MbKRAz467rA5pg@mail.gmail.com>
On 02/20/2013 09:51 PM, anish singh wrote:
>> I intend to embed the BB in our new product if I can solve a small
>> problem. The BB has 2 SPI ports, 1 with 1 chip select and the other
>> with 2. Only one port is supported in the standard kernel. I found
>> some info that guided me into activating the new port and having all
>> three devices enumerated in /dev.
> Which three devices?
Not that it matters but a 1 MS/S A/D converter, a DDS synthesizer and a
bit of an FPGA that fans out one word of data to 16 control lines.
>>
>> What I have not yet been able to do is figure out how to enable that
>> second chip select line. So my first question is, where do I start
> What does this second chip select line does?
Pick one of the three functions above.
>> looking for the existing code? I'm hoping that I'll be lucky enough to
>> reuse that code, changing a bit or two in the CPU register.
> Can you show us the schematic?
No, it's still just a pencil sketch. But I don't need a completed
schematic to know that I need 3 SPI channels and the Bone only has one
enabled by default. I've enabled the other port. Now I need to figure
out how to enable that port's second chip select line. That was my
question. Any suggestions?
John
--
John DeArmond
Tellico Plains, Occupied TN
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next prev parent reply other threads:[~2013-02-23 16:38 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-20 7:31 Intro and some questions NeonJohn
2013-02-21 2:51 ` anish singh
2013-02-23 16:38 ` NeonJohn [this message]
2013-02-24 3:38 ` NeonJohn
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