From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhenzhong Duan Subject: Re: passthroughed msix device Date: Thu, 28 Feb 2013 12:57:41 +0800 Message-ID: <512EE3C5.9090208@oracle.com> References: <512C78D2.8030903@oracle.com> <512C979E02000078000C105F@nat28.tlf.novell.com> <512D9E86.1080907@oracle.com> <512DD3AD02000078000C156C@nat28.tlf.novell.com> Reply-To: zhenzhong.duan@oracle.com Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <512DD3AD02000078000C156C@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: Konrad Rzeszutek Wilk , xen-devel , Joe Jin , stefano.stabellini@eu.citrix.com List-Id: xen-devel@lists.xenproject.org On 2013-02-27 16:36, Jan Beulich wrote: >>>> On 27.02.13 at 06:49, Zhenzhong Duan wrote: >> On 2013-02-26 18:08, Jan Beulich wrote: >>>>>> On 26.02.13 at 09:56, DuanZhenzhong wrote: >>>> pci_msix_writel: Can't update entry 0 since MSI-X is already enabled >>>> (fee00000 -> fee02000) >>>> pci_msix_writel: Can't update entry 0 since MSI-X is already enabled >>>> (00004059 -> 00004071) >>> If you look at the code issuing this message, the situation is >>> pretty clear (and I think it as described already in the past, >>> albeit I have no link at hand): qemu lacks proper emulation of >>> the mask bit. pci_msix_write() looks at the physical one, yet >>> when the guest sets the virtual mask bit, nothing is being >>> done at all to make the hypervisor also mask the physical >>> entry: >>> >>> if (offset == PCI_MSIX_ENTRY_VECTOR_CTRL) { >>> if (msix->enabled && !(val & PCI_MSIX_ENTRY_CTRL_MASKBIT)) { >>> xen_pt_msix_update_one(s, entry_nr); >>> } >>> } >>> >>> There's probably quite a bit of code to be written to make this >>> work. >> Is there plan of fixing it? > I'm not aware of anyone working on this, or having planned to. > Want to take a shot? I'm looking at it. zduan