Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16

[Fabien Chouteau <chouteau@adacore.com>]

On 02/28/2013 07:42 PM, Peter Maydell wrote:
> On 28 February 2013 17:39, Fabien Chouteau <chouteau@adacore.com> wrote:
>> On 02/28/2013 03:16 PM, Peter Maydell wrote:
>>> On 28 February 2013 14:01, Fabien Chouteau <chouteau@adacore.com> wrote:
>>>> In fact I'm
>>>> working on a big-endian R4F (TMS570) and I have endianness issue in the
>>>> communication with GDB.
>>>
>>> If you're also trying to get big-endian mode to work (linux-user
>>> mode or system emulation?) you may have more problems than merely
>>> implementing R4 support or VFP-D16 :-)
> 
>> I already built qemu-system-armeb, and implemented few devices of the
>> TMS570 (rti, sci, and vim). Besides this GDB issue I have no endianness
>> problem so far.
> 
> This is probably some combination of luck and insufficient testing.
> If you submit some patches I will review them :-)
> 

Well my goal is not to test every ARM cpu and every devices in big-endian.

I only need a small subset of TMS570: - Cortex-R4F without MPU
                                      - Timers (RTI)
                                      - Serial port (SCI)
                                      - Interrupt manager (RTI)
and everything works good so far.


> How are you handling the SCTLR IE and EE bits?
>

I did nothing, as far as I know it's not possible to switch endianness
in QEMU. TMS570 are configured for big-endian only, so this is not a
problem for me.

>>> Are you planning to do the v7 PMSA support?
> 
>> I don't know what that is, but I'll take a look :)
> 
> It's the Memory Protection Unit -- QEMU currently only has the
> old v5 MPU, and register_cpu_regs_for_features() will assert
> if your CPU is v6 or v7 and has the FEATURE_MPU bit set.
> If you're putting in system emulation for an R4 then you must
> implement this (and I'm surprised you've managed to get anything
> significant to run without it).
> 

The programs I run don't need MPU, so for the moment I have no plan to
implement PMSA.

Regards,

-- 
Fabien Chouteau