From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:57742) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UCpb2-0004sO-Fl for qemu-devel@nongnu.org; Tue, 05 Mar 2013 05:59:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UCpb1-0002mV-95 for qemu-devel@nongnu.org; Tue, 05 Mar 2013 05:59:48 -0500 Received: from mel.act-europe.fr ([194.98.77.210]:44276) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UCpb1-0002mO-2Z for qemu-devel@nongnu.org; Tue, 05 Mar 2013 05:59:47 -0500 Message-ID: <5135D022.9060900@adacore.com> Date: Tue, 05 Mar 2013 11:59:46 +0100 From: Fabien Chouteau MIME-Version: 1.0 References: <1362158507-19310-1-git-send-email-chouteau@adacore.com> <201303041330.37991.paul@codesourcery.com> <5134DA80.7070304@adacore.com> <201303042334.02147.paul@codesourcery.com> In-Reply-To: <201303042334.02147.paul@codesourcery.com> Content-Type: text/plain; charset=ISO-8859-6 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 3/4] target-arm: Fix VFP register byte order in GDB remote List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paul Brook , "qemu-devel@nongnu.org" On 03/05/2013 12:34 AM, Paul Brook wrote: >>> Because we're actually storing two halves of a 128-bit value. You still >>> store the least significant half first. >> >> Right, I'm sorry I didn't see you comment was only about the Q registers. >> What would be the solution then? >> >> #ifdef TARGET_WORDS_BIGENDIAN >> stfq_p(buf, env->vfp.regs[(reg - 32) * 2 + 1]); >> stfq_p(buf + 8, env->vfp.regs[(reg - 32) * 2]); >> #else >> stfq_p(buf, env->vfp.regs[(reg - 32) * 2]); >> stfq_p(buf + 8, env->vfp.regs[(reg - 32) * 2 + 1]); >> #endif /* TARGET_WORDS_BIGENDIAN */ > > Yes, something like that. > Alright, I'll do that for V2. Thanks, -- Fabien Chouteau