From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:59963) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UFN46-0001xg-2D for qemu-devel@nongnu.org; Tue, 12 Mar 2013 07:08:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UFN42-0007yn-PM for qemu-devel@nongnu.org; Tue, 12 Mar 2013 07:08:18 -0400 Received: from ssl.dlhnet.de ([91.198.192.8]:43774 helo=ssl.dlh.net) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UFN42-0007yi-JV for qemu-devel@nongnu.org; Tue, 12 Mar 2013 07:08:14 -0400 Message-ID: <513F08BF.4040209@dlhnet.de> Date: Tue, 12 Mar 2013 11:51:43 +0100 From: Peter Lieven MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [RFC] optimize is_dup_page for zero pages List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "qemu-devel@nongnu.org" Cc: peter.maydell@linaro.org, Paolo Bonzini , Kevin Wolf , Stefan Hajnoczi Hi, a second patch to optimize live migration. I have generated some artifical load testing for zero pages. Ordinary dup or non dup pages are not affected. savings for zero pages (test case): non SSE2: 30s -> 26s SSE2: 27s -> 21s optionally I would suggest optimizing buffer_is_zero to use SSE2 if addr is 16 byte aligned and length is 128 byte aligned. in this case bdrv functions could also benefit from it. Peter diff --git a/arch_init.c b/arch_init.c index 98e2bc6..e1051e6 100644 --- a/arch_init.c +++ b/arch_init.c @@ -164,9 +164,37 @@ int qemu_read_default_config_files(bool userconfig) return 0; } -static int is_dup_page(uint8_t *page) +#if __SSE2__ +static int is_zero_page_sse2(u_int8_t *page) { VECTYPE *p = (VECTYPE *)page; + VECTYPE zero = _mm_setzero_si128(); + int i; + for (i = 0; i < (TARGET_PAGE_SIZE / sizeof(VECTYPE)); i+=8) { + VECTYPE tmp0 = _mm_or_si128(p[i+0],p[i+1]); + VECTYPE tmp1 = _mm_or_si128(p[i+2],p[i+3]); + VECTYPE tmp2 = _mm_or_si128(p[i+4],p[i+5]); + VECTYPE tmp3 = _mm_or_si128(p[i+6],p[i+7]); + VECTYPE tmp01 = _mm_or_si128(tmp0,tmp1); + VECTYPE tmp23 = _mm_or_si128(tmp2,tmp3); + if (!ALL_EQ(_mm_or_si128(tmp01,tmp23), zero)) { + return 0; + } + } + return 1; +} +#endif + +static int is_dup_page(u_int8_t *page) { + if (!page[0]) { +#if __SSE2__ + return is_zero_page_sse2(page); +#else + return buffer_is_zero(page, TARGET_PAGE_SIZE); +#endif + } + + VECTYPE *p = (VECTYPE *)page; VECTYPE val = SPLAT(page); int i;