From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joonyoung Shim Subject: Re: [PATCH 3/7] drm/exynos: Fix G2D core mulfunctioning issue Date: Wed, 13 Mar 2013 18:53:06 +0900 Message-ID: <51404C82.4080403@samsung.com> References: <1363165441-7448-1-git-send-email-inki.dae@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by gabe.freedesktop.org (Postfix) with ESMTP id CF88FE5ECC for ; Wed, 13 Mar 2013 02:52:30 -0700 (PDT) Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MJL00K2ZFF7HYC0@mailout3.samsung.com> for dri-devel@lists.freedesktop.org; Wed, 13 Mar 2013 18:52:29 +0900 (KST) In-reply-to: <1363165441-7448-1-git-send-email-inki.dae@samsung.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: Inki Dae Cc: kyungmin.park@samsung.com, sw0312.kim@samsung.com, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org On 03/13/2013 06:04 PM, Inki Dae wrote: > From: YoungJun Cho > > This patch fixes G2D core mulfunctioning issue once g2d dma is started. > Without 'DMA_HOLD_CMD_REG' register setting, there is only one interrupt > after the execution to all command lists have been completed. And that > induces watchdog. So this patch sets 'LIST_HOLD' command to the register > so that command execution interrupt can be occured whenever each command > list execution is finished. No, this problem occurs as GCF bit of INTEN_REG register is enabled always. If wants to raise interrupt immediately after a command list finished, GCF bit should be enabled, and it also needs to enable of LIST Hold bit of DMA_HOLD_CMD_REG register. If one of the two is missed out, g2d hardware will not work normally sometimes. This patch is just workaround and it can happen performance issue because g2d hardware stops a moment whenever a command list finished. So, we need the way which enable GCF bit only when a command list completion interrupt needs. Thanks. > Signed-off-by: YoungJun Cho > Signed-off-by: Inki Dae > Signed-off-by: Kyungmin Park > --- > drivers/gpu/drm/exynos/exynos_drm_g2d.c | 13 ++++++++----- > 1 files changed, 8 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c > index 095520f..91bc4cc 100644 > --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c > +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c > @@ -82,7 +82,7 @@ > #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17 > > /* G2D_DMA_HOLD_CMD */ > -#define G2D_USET_HOLD (1 << 2) > +#define G2D_USER_HOLD (1 << 2) > #define G2D_LIST_HOLD (1 << 1) > #define G2D_BITBLT_HOLD (1 << 0) > > @@ -863,10 +863,13 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data, > cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR; > cmdlist->data[cmdlist->last++] = 0; > > - if (node->event) { > - cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD; > - cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD; > - } > + /* > + * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG > + * if user wants G2D interrupt event once each command list or > + * BitBLT command execution is finished. > + */ > + cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD; > + cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD; > > /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */ > size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;