Re: on-die ECC support

[Peter Horton <phorton@bitbox.co.uk>]

On 15/03/2013 16:08, David Mosberger-Tang wrote:
> We need to be able to support 4-bit-correcting ECC with a
> micro-controller that doesn't have hardware-support for that.  We are
> planning to use the on-die ECC controller supported by Micron flash
> chips.  I suppose we could use the BCH swecc support in the Linux
> kernel, but I'm concerned about the performance implication of that
> and we'd also have to add BCH ecc to our bootloader, which would mean
> more development and testing.
>

Be careful using the NAND status register to indicate bit flips. The 
chips we were using set the status bit for any correction and this can 
result in very high error counts. Some of the pages had bits which are 
permanently 0 or 1 meaning they might need correction every read. We 
worked around this by re-reading any page that the chip flagged as 
corrected and using the software BCH to work out the actual number of 
bits in error.

P.