Re: [PATCH] mtd: nand: subpage write support for hardware based ECC schemes

[Matthieu CASTET <matthieu.castet@parrot.com>]

Gupta, Pekon a écrit :
> Hi,
> 
>> On which controller was it tested ?
> 
> [Pekon]: I tested it on TI's omap controller itself :-)
> However I ran following, to confirm..
> (1) mtd_subpagetest: part of MTD tests
> (2) ubiattach & ubiformat of ubi image built with Volume Header at 512 offset
> that is using -O 512.
> (3) nand raw read / write with non-page aligned data.
> 
> Do you have any other tests in mind ?
> 
> 
>> The problem is that lot's of controller driver with hw ecc hack the ecc interface.
> 
>> For example the TI omap driver don't use the data pointer of ecc.calculate but
>> use the data send on the nand interface.
> 
> [Pekon]: Yes i agree. But what I see in TI's hack also that ECC is calculated for 
> each subpage separately. Its just that instead of using data in 
> chip->buffers->databuf
> TI's driver uses data which is present in controller's internal buffers, which 
> should be the way if we are depending on Hardware (controller) to do ECC.
> Is this something different from other Hardware based ECC implementations?
Yes for example some controller have ecc that for a 0xff page is not 0xff.
And this ecc is generated on the fly : you can't xor it before writing it to the
flash.

I know that omap driver with ELM error correction did not generated 0xff ecc for
a black page. I wonder if it works why your patch.


Matthieu