diff for duplicates of <514C7D3B.40602@wwwdotorg.org> diff --git a/a/1.txt b/N1/1.txt index cf56ef7..4f9f6fb 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ On 03/22/2013 05:54 AM, Peter De Schrijver wrote: > The PLL code relies on udelay() which is not available when CCF is > initialized. Hence we can't enable any PLL during this phase. > -> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> > > -- > diff --git a/a/content_digest b/N1/content_digest index df6e300..8672920 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,22 +1,15 @@ "ref\01363953308-28828-1-git-send-email-pdeschrijver@nvidia.com\0" - "ref\01363953308-28828-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0" - "Subject\0Re: [PATCH] clk: tegra: Don't enable PLLs during early boot\0" + "From\0swarren@wwwdotorg.org (Stephen Warren)\0" + "Subject\0[PATCH] clk: tegra: Don't enable PLLs during early boot\0" "Date\0Fri, 22 Mar 2013 09:48:11 -0600\0" - "To\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" - Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Thierry Reding <thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org> - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 03/22/2013 05:54 AM, Peter De Schrijver wrote:\n" "> The PLL code relies on udelay() which is not available when CCF is\n" "> initialized. Hence we can't enable any PLL during this phase.\n" "> \n" - "> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>\n" "> \n" "> --\n" "> \n" @@ -43,4 +36,4 @@ "machine descriptor's init_irq function, rather than in the init_machine\n" function? Can this be moved? -406a60e634068825537a685de56a1b59739ef9f240333a53c790ca86d7e07003 +2cb8c7965327cab5a49cfe096c75f745430483d989a5553962b8a144aded39af
diff --git a/a/1.txt b/N2/1.txt index cf56ef7..4f9f6fb 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -2,7 +2,7 @@ On 03/22/2013 05:54 AM, Peter De Schrijver wrote: > The PLL code relies on udelay() which is not available when CCF is > initialized. Hence we can't enable any PLL during this phase. > -> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> > > -- > diff --git a/a/content_digest b/N2/content_digest index df6e300..23e90ce 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,22 +1,21 @@ "ref\01363953308-28828-1-git-send-email-pdeschrijver@nvidia.com\0" - "ref\01363953308-28828-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" - "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0" + "From\0Stephen Warren <swarren@wwwdotorg.org>\0" "Subject\0Re: [PATCH] clk: tegra: Don't enable PLLs during early boot\0" "Date\0Fri, 22 Mar 2013 09:48:11 -0600\0" - "To\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" - Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Thierry Reding <thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org> - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0Peter De Schrijver <pdeschrijver@nvidia.com>\0" + "Cc\0linux-arm-kernel@lists.infradead.org" + Prashant Gaikwad <pgaikwad@nvidia.com> + Mike Turquette <mturquette@linaro.org> + Thierry Reding <thierry.reding@avionic-design.de> + linux-tegra@vger.kernel.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "On 03/22/2013 05:54 AM, Peter De Schrijver wrote:\n" "> The PLL code relies on udelay() which is not available when CCF is\n" "> initialized. Hence we can't enable any PLL during this phase.\n" "> \n" - "> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>\n" "> \n" "> --\n" "> \n" @@ -43,4 +42,4 @@ "machine descriptor's init_irq function, rather than in the init_machine\n" function? Can this be moved? -406a60e634068825537a685de56a1b59739ef9f240333a53c790ca86d7e07003 +4ce677e5de5aab0cdd98fee8c178526628b589e08fbc24427e6ac273c1f35f57
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