From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36106) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UKswW-0006wl-VT for qemu-devel@nongnu.org; Wed, 27 Mar 2013 12:11:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UKswN-0001IX-OE for qemu-devel@nongnu.org; Wed, 27 Mar 2013 12:11:16 -0400 Message-ID: <51531A1A.1010107@adacore.com> Date: Wed, 27 Mar 2013 17:11:06 +0100 From: Fabien Chouteau MIME-Version: 1.0 References: <1364392235-6193-1-git-send-email-chouteau@adacore.com> <4427FBE0-BA0D-4BFD-9D7C-F1406DF5239A@suse.de> <5153093D.6040802@adacore.com> <6F814D75-FCE6-4B8A-8510-0AE8FCFB0A9E@suse.de> <51531522.2060402@adacore.com> In-Reply-To: <51531522.2060402@adacore.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH] PPC: init_excp_7x0: fix hreset entry point. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 03/27/2013 04:49 PM, Fabien Chouteau wrote: > On 03/27/2013 04:10 PM, Alexander Graf wrote: >>> It's actually already implemented (helper_regs.h:96). The question is: >>> what is the value of MSR[IP] at reset? >> >> For 740 / 750, it's 1. All other bits are 0. > > Is it true for all PPC, because MSR_EP/IP is set for all kind of CPU right now. > Well, when the msr_maks allows it... -- Fabien Chouteau