From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: Unreachable code about cpu features
Date: Thu, 28 Mar 2013 15:08:49 +0000
Message-ID: <51545D01.2000809@citrix.com>
References: <CAJBXtnnO+Mpmasv3qNG+O_dAkkQf8Uqr1-Um_KKL_YuxZ7xoKA@mail.gmail.com>
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To: Choonho Son <choonho.son@gmail.com>
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On 28/03/2013 14:40, Choonho Son wrote:
> Hi all,
>
> I still have some questions about cpu flags.
> -
> Reference: http://lists.xen.org/archives/html/xen-devel/2013-03/msg00891.html
>
> I printed the values about following code:
>  if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx &
>                opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx &
>                opt_cpuid_mask_xsave_eax))
>                 return;
>
> Above code is always true, so the next "switch" code is not reachable.
> Is it correct code?

No - these variables can be specified on the command line, as is the
convention with variable beginning "opt_".

The result is that if the user specifies any of them, we enter the
switch statement and apply the appropriate feature masking.

~Andrew

>
> ##############################
> # Source: xen/arch/x86/cpu/intel.c
> ##############################
>
> #################
> # debugging result
> #################
> (XEN) opt_cpuid_mask_ecx:-1 opt_cpuid_mask_edx:-1
> opt_cpuid_mask_ext_ecx:-1 opt_cpuid_mask_ext_edx:-1
> opt_cpuid_mask_xsave_eax:-1
>
> /*
>  * opt_cpuid_mask_ecx/edx: cpuid.1[ecx, edx] feature mask.
>  * For example, E8400[Intel Core 2 Duo Processor series] ecx = 0x0008E3FD,
>  * edx = 0xBFEBFBFF when executing CPUID.EAX = 1 normally. If you want to
>  * 'rev down' to E8400, you can set these values in these Xen boot
> parameters.
>  */
> static void __devinit set_cpuidmask(const struct cpuinfo_x86 *c)
> {
>         u32 eax, edx;
>         const char *extra = "";
>
>
>         printk(XENLOG_INFO  "opt_cpuid_mask_ecx:%d
> opt_cpuid_mask_edx:%d opt_cpuid_mask_ext_ecx:%d
> opt_cpuid_mask_ext_edx:%d opt_cpuid_mask_xsave_eax:%d\n",
> opt_cpuid_mask_ecx, opt_cpuid_mask_edx, opt_cpuid_mask_ext_ecx,
> opt_cpuid_mask_ext_edx,opt_cpuid_mask_xsave_eax);
>         if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx &
>                opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx &
>                opt_cpuid_mask_xsave_eax))
>                 return;
>
>         /**************************
>          * Unreachable code (?)
>          **************************/
>
>         /* Only family 6 supports this feature  */
>         switch ((c->x86 == 6) * c->x86_model) {
>         case 0x17:
>                 if ((c->x86_mask & 0x0f) < 4)
>                         break;
>                 /* fall through */
>         case 0x1d:
>                 wrmsr(MSR_INTEL_CPUID_FEATURE_MASK,
>          ...