From mboxrd@z Thu Jan 1 00:00:00 1970 From: Choonho Son Subject: Unreachable code about cpu features Date: Thu, 28 Mar 2013 23:40:31 +0900 Message-ID: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8418675512223823479==" Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org --===============8418675512223823479== Content-Type: multipart/alternative; boundary=20cf306f77e0f2067504d8fd229c --20cf306f77e0f2067504d8fd229c Content-Type: text/plain; charset=ISO-8859-1 Hi all, I still have some questions about cpu flags. - Reference: http://lists.xen.org/archives/html/xen-devel/2013-03/msg00891.html I printed the values about following code: if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx & opt_cpuid_mask_xsave_eax)) return; Above code is always true, so the next "switch" code is not reachable. Is it correct code? ############################## # Source: xen/arch/x86/cpu/intel.c ############################## ################# # debugging result ################# (XEN) opt_cpuid_mask_ecx:-1 opt_cpuid_mask_edx:-1 opt_cpuid_mask_ext_ecx:-1 opt_cpuid_mask_ext_edx:-1 opt_cpuid_mask_xsave_eax:-1 /* * opt_cpuid_mask_ecx/edx: cpuid.1[ecx, edx] feature mask. * For example, E8400[Intel Core 2 Duo Processor series] ecx = 0x0008E3FD, * edx = 0xBFEBFBFF when executing CPUID.EAX = 1 normally. If you want to * 'rev down' to E8400, you can set these values in these Xen boot parameters. */ static void __devinit set_cpuidmask(const struct cpuinfo_x86 *c) { u32 eax, edx; const char *extra = ""; printk(XENLOG_INFO "opt_cpuid_mask_ecx:%d opt_cpuid_mask_edx:%d opt_cpuid_mask_ext_ecx:%d opt_cpuid_mask_ext_edx:%d opt_cpuid_mask_xsave_eax:%d\n", opt_cpuid_mask_ecx, opt_cpuid_mask_edx, opt_cpuid_mask_ext_ecx, opt_cpuid_mask_ext_edx,opt_cpuid_mask_xsave_eax); if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx & opt_cpuid_mask_xsave_eax)) return; /************************** * Unreachable code (?) **************************/ /* Only family 6 supports this feature */ switch ((c->x86 == 6) * c->x86_model) { case 0x17: if ((c->x86_mask & 0x0f) < 4) break; /* fall through */ case 0x1d: wrmsr(MSR_INTEL_CPUID_FEATURE_MASK, ... --20cf306f77e0f2067504d8fd229c Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Hi all,

I still have some questions about cpu flags= .

I printed the values about following code:
=A0if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx &
= =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0opt_cpuid_mask_ext_ecx & opt_cpuid_mask_= ext_edx &
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0opt_cpuid_mask_xsave_eax))
= =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return;

Abov= e code is always true, so the next "switch" code is not reachable= .
Is it correct code?

##############################
# Source:=A0xe= n/arch/x86/cpu/intel.c
##############################
<= br>
#################
# debugging result
####= #############
(XEN) opt_cpuid_mask_ecx:-1 opt_cpuid_mask_edx:-1 opt_cpuid_mask_ext_e= cx:-1 opt_cpuid_mask_ext_edx:-1 opt_cpuid_mask_xsave_eax:-1

/*
=A0* opt_cpuid_mask_ecx/edx: cpuid.1[ecx,= edx] feature mask.
=A0* For example, E8400[Intel Core 2 Duo Processor series] ecx =3D 0x0= 008E3FD,
=A0* edx =3D 0xBFEBFBFF when executing CPUID.EAX =3D 1 n= ormally. If you want to
=A0* 'rev down' to E8400, you can= set these values in these Xen boot parameters.
=A0*/
static void __devinit set_cpuidmask(const struct cpuin= fo_x86 *c)
{
=A0 =A0 =A0 =A0 u32 eax, edx;
= =A0 =A0 =A0 =A0 const char *extra =3D "";


=A0 =A0 =A0 =A0 printk(XENLOG_INFO =A0"opt_cpuid_mask= _ecx:%d opt_cpuid_mask_edx:%d opt_cpuid_mask_ext_ecx:%d opt_cpuid_mask_ext_= edx:%d opt_cpuid_mask_xsave_eax:%d\n", opt_cpuid_mask_ecx, opt_cpuid_m= ask_edx, opt_cpuid_mask_ext_ecx, opt_cpuid_mask_ext_edx,opt_cpuid_mask_xsav= e_eax);
=A0 =A0 =A0 =A0 if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx &am= p;
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0opt_cpuid_mask_ext_ecx & op= t_cpuid_mask_ext_edx &
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0opt_cpu= id_mask_xsave_eax))
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return;

=A0 =A0 =A0 =A0 /**************************
=
=A0 =A0 =A0 =A0 =A0* Unreachable code (?)
=A0 =A0 =A0 =A0 = =A0**************************/

=A0 =A0 =A0 = =A0 /* Only family 6 supports this feature =A0*/
=A0 =A0 =A0 =A0 switch ((c->x86 =3D=3D 6) * c->x86_model) {
=A0 =A0 =A0 =A0 case 0x17:
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = if ((c->x86_mask & 0x0f) < 4)
=A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0 =A0 =A0 =A0 break;
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /*= fall through */
=A0 =A0 =A0 =A0 case 0x1d:
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 w= rmsr(MSR_INTEL_CPUID_FEATURE_MASK,
=A0 =A0 =A0 =A0 =A0... --20cf306f77e0f2067504d8fd229c-- --===============8418675512223823479== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --===============8418675512223823479==-- From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: Re: Unreachable code about cpu features Date: Thu, 28 Mar 2013 15:09:25 +0000 Message-ID: <51546B3502000078000C958F@nat28.tlf.novell.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Choonho Son Cc: xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org >>> On 28.03.13 at 15:40, Choonho Son wrote: > I still have some questions about cpu flags. > - Reference: > http://lists.xen.org/archives/html/xen-devel/2013-03/msg00891.html > > I printed the values about following code: > if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & > opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx & > opt_cpuid_mask_xsave_eax)) > return; > > Above code is always true, so the next "switch" code is not reachable. > Is it correct code? Of course it is - you just need to make use of the respective command line options to get those variable have other than their default (initial) values. It is intentional for the code to do nothing without command line option saying so. Jan From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: Unreachable code about cpu features Date: Thu, 28 Mar 2013 15:08:49 +0000 Message-ID: <51545D01.2000809@citrix.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Choonho Son Cc: "xen-devel@lists.xen.org" List-Id: xen-devel@lists.xenproject.org On 28/03/2013 14:40, Choonho Son wrote: > Hi all, > > I still have some questions about cpu flags. > - > Reference: http://lists.xen.org/archives/html/xen-devel/2013-03/msg00891.html > > I printed the values about following code: > if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & > opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx & > opt_cpuid_mask_xsave_eax)) > return; > > Above code is always true, so the next "switch" code is not reachable. > Is it correct code? No - these variables can be specified on the command line, as is the convention with variable beginning "opt_". The result is that if the user specifies any of them, we enter the switch statement and apply the appropriate feature masking. ~Andrew > > ############################## > # Source: xen/arch/x86/cpu/intel.c > ############################## > > ################# > # debugging result > ################# > (XEN) opt_cpuid_mask_ecx:-1 opt_cpuid_mask_edx:-1 > opt_cpuid_mask_ext_ecx:-1 opt_cpuid_mask_ext_edx:-1 > opt_cpuid_mask_xsave_eax:-1 > > /* > * opt_cpuid_mask_ecx/edx: cpuid.1[ecx, edx] feature mask. > * For example, E8400[Intel Core 2 Duo Processor series] ecx = 0x0008E3FD, > * edx = 0xBFEBFBFF when executing CPUID.EAX = 1 normally. If you want to > * 'rev down' to E8400, you can set these values in these Xen boot > parameters. > */ > static void __devinit set_cpuidmask(const struct cpuinfo_x86 *c) > { > u32 eax, edx; > const char *extra = ""; > > > printk(XENLOG_INFO "opt_cpuid_mask_ecx:%d > opt_cpuid_mask_edx:%d opt_cpuid_mask_ext_ecx:%d > opt_cpuid_mask_ext_edx:%d opt_cpuid_mask_xsave_eax:%d\n", > opt_cpuid_mask_ecx, opt_cpuid_mask_edx, opt_cpuid_mask_ext_ecx, > opt_cpuid_mask_ext_edx,opt_cpuid_mask_xsave_eax); > if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & > opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx & > opt_cpuid_mask_xsave_eax)) > return; > > /************************** > * Unreachable code (?) > **************************/ > > /* Only family 6 supports this feature */ > switch ((c->x86 == 6) * c->x86_model) { > case 0x17: > if ((c->x86_mask & 0x0f) < 4) > break; > /* fall through */ > case 0x1d: > wrmsr(MSR_INTEL_CPUID_FEATURE_MASK, > ... From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: Unreachable code about cpu features Date: Thu, 28 Mar 2013 15:40:10 +0000 Message-ID: <5154645A.7000507@citrix.com> References: <51545D01.2000809@citrix.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============9148219759548235983==" Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Choonho Son List-Id: xen-devel@lists.xenproject.org --===============9148219759548235983== Content-Type: multipart/alternative; boundary="------------040903080407010004020007" --------------040903080407010004020007 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit On 28/03/2013 15:30, Choonho Son wrote: > Thanks for quick response. > > How can I overwrite values using command line? > I want to hide AVX flag even though my CPU is sandybridge. > > Thanks, Dropping xen-devel to bcc as this is a xen-users question http://xenbits.xen.org/docs/unstable/misc/xen-command-line.html >>From memory, you probably want cpuid_mask_ext_ecx=fffeffff ~Andrew > > > 2013/3/29 Andrew Cooper > > > On 28/03/2013 14:40, Choonho Son wrote: > > Hi all, > > > > I still have some questions about cpu flags. > > - > > Reference: > http://lists.xen.org/archives/html/xen-devel/2013-03/msg00891.html > > > > I printed the values about following code: > > if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & > > opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx & > > opt_cpuid_mask_xsave_eax)) > > return; > > > > Above code is always true, so the next "switch" code is not > reachable. > > Is it correct code? > > No - these variables can be specified on the command line, as is the > convention with variable beginning "opt_". > > The result is that if the user specifies any of them, we enter the > switch statement and apply the appropriate feature masking. > > ~Andrew > > > > > ############################## > > # Source: xen/arch/x86/cpu/intel.c > > ############################## > > > > ################# > > # debugging result > > ################# > > (XEN) opt_cpuid_mask_ecx:-1 opt_cpuid_mask_edx:-1 > > opt_cpuid_mask_ext_ecx:-1 opt_cpuid_mask_ext_edx:-1 > > opt_cpuid_mask_xsave_eax:-1 > > > > /* > > * opt_cpuid_mask_ecx/edx: cpuid.1[ecx, edx] feature mask. > > * For example, E8400[Intel Core 2 Duo Processor series] ecx = > 0x0008E3FD, > > * edx = 0xBFEBFBFF when executing CPUID.EAX = 1 normally. If > you want to > > * 'rev down' to E8400, you can set these values in these Xen boot > > parameters. > > */ > > static void __devinit set_cpuidmask(const struct cpuinfo_x86 *c) > > { > > u32 eax, edx; > > const char *extra = ""; > > > > > > printk(XENLOG_INFO "opt_cpuid_mask_ecx:%d > > opt_cpuid_mask_edx:%d opt_cpuid_mask_ext_ecx:%d > > opt_cpuid_mask_ext_edx:%d opt_cpuid_mask_xsave_eax:%d\n", > > opt_cpuid_mask_ecx, opt_cpuid_mask_edx, opt_cpuid_mask_ext_ecx, > > opt_cpuid_mask_ext_edx,opt_cpuid_mask_xsave_eax); > > if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & > > opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx & > > opt_cpuid_mask_xsave_eax)) > > return; > > > > /************************** > > * Unreachable code (?) > > **************************/ > > > > /* Only family 6 supports this feature */ > > switch ((c->x86 == 6) * c->x86_model) { > > case 0x17: > > if ((c->x86_mask & 0x0f) < 4) > > break; > > /* fall through */ > > case 0x1d: > > wrmsr(MSR_INTEL_CPUID_FEATURE_MASK, > > ... > > --------------040903080407010004020007 Content-Type: text/html; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit
On 28/03/2013 15:30, Choonho Son wrote:
Thanks for quick response.

How can I overwrite values using command line?
I want to hide AVX flag even though my CPU is sandybridge.

Thanks,

Dropping xen-devel to bcc as this is a xen-users question

http://xenbits.xen.org/docs/unstable/misc/xen-command-line.html

From memory, you probably want

cpuid_mask_ext_ecx=fffeffff

~Andrew



2013/3/29 Andrew Cooper <andrew.cooper3@citrix.com>
On 28/03/2013 14:40, Choonho Son wrote:
> Hi all,
>
> I still have some questions about cpu flags.
> -
> Reference: http://lists.xen.org/archives/html/xen-devel/2013-03/msg00891.html
>
> I printed the values about following code:
>  if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx &
>                opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx &
>                opt_cpuid_mask_xsave_eax))
>                 return;
>
> Above code is always true, so the next "switch" code is not reachable.
> Is it correct code?

No - these variables can be specified on the command line, as is the
convention with variable beginning "opt_".

The result is that if the user specifies any of them, we enter the
switch statement and apply the appropriate feature masking.

~Andrew

>
> ##############################
> # Source: xen/arch/x86/cpu/intel.c
> ##############################
>
> #################
> # debugging result
> #################
> (XEN) opt_cpuid_mask_ecx:-1 opt_cpuid_mask_edx:-1
> opt_cpuid_mask_ext_ecx:-1 opt_cpuid_mask_ext_edx:-1
> opt_cpuid_mask_xsave_eax:-1
>
> /*
>  * opt_cpuid_mask_ecx/edx: cpuid.1[ecx, edx] feature mask.
>  * For example, E8400[Intel Core 2 Duo Processor series] ecx = 0x0008E3FD,
>  * edx = 0xBFEBFBFF when executing CPUID.EAX = 1 normally. If you want to
>  * 'rev down' to E8400, you can set these values in these Xen boot
> parameters.
>  */
> static void __devinit set_cpuidmask(const struct cpuinfo_x86 *c)
> {
>         u32 eax, edx;
>         const char *extra = "";
>
>
>         printk(XENLOG_INFO  "opt_cpuid_mask_ecx:%d
> opt_cpuid_mask_edx:%d opt_cpuid_mask_ext_ecx:%d
> opt_cpuid_mask_ext_edx:%d opt_cpuid_mask_xsave_eax:%d\n",
> opt_cpuid_mask_ecx, opt_cpuid_mask_edx, opt_cpuid_mask_ext_ecx,
> opt_cpuid_mask_ext_edx,opt_cpuid_mask_xsave_eax);
>         if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx &
>                opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx &
>                opt_cpuid_mask_xsave_eax))
>                 return;
>
>         /**************************
>          * Unreachable code (?)
>          **************************/
>
>         /* Only family 6 supports this feature  */
>         switch ((c->x86 == 6) * c->x86_model) {
>         case 0x17:
>                 if ((c->x86_mask & 0x0f) < 4)
>                         break;
>                 /* fall through */
>         case 0x1d:
>                 wrmsr(MSR_INTEL_CPUID_FEATURE_MASK,
>          ...



--------------040903080407010004020007-- --===============9148219759548235983== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --===============9148219759548235983==-- From mboxrd@z Thu Jan 1 00:00:00 1970 From: Choonho Son Subject: Re: Unreachable code about cpu features Date: Fri, 29 Mar 2013 00:30:44 +0900 Message-ID: References: <51545D01.2000809@citrix.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============8349791054781157429==" Return-path: In-Reply-To: <51545D01.2000809@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Andrew Cooper Cc: "xen-devel@lists.xen.org" List-Id: xen-devel@lists.xenproject.org --===============8349791054781157429== Content-Type: multipart/alternative; boundary=000e0cd5c06a85109f04d8fdd65c --000e0cd5c06a85109f04d8fdd65c Content-Type: text/plain; charset=ISO-8859-1 Thanks for quick response. How can I overwrite values using command line? I want to hide AVX flag even though my CPU is sandybridge. Thanks, 2013/3/29 Andrew Cooper > On 28/03/2013 14:40, Choonho Son wrote: > > Hi all, > > > > I still have some questions about cpu flags. > > - > > Reference: > http://lists.xen.org/archives/html/xen-devel/2013-03/msg00891.html > > > > I printed the values about following code: > > if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & > > opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx & > > opt_cpuid_mask_xsave_eax)) > > return; > > > > Above code is always true, so the next "switch" code is not reachable. > > Is it correct code? > > No - these variables can be specified on the command line, as is the > convention with variable beginning "opt_". > > The result is that if the user specifies any of them, we enter the > switch statement and apply the appropriate feature masking. > > ~Andrew > > > > > ############################## > > # Source: xen/arch/x86/cpu/intel.c > > ############################## > > > > ################# > > # debugging result > > ################# > > (XEN) opt_cpuid_mask_ecx:-1 opt_cpuid_mask_edx:-1 > > opt_cpuid_mask_ext_ecx:-1 opt_cpuid_mask_ext_edx:-1 > > opt_cpuid_mask_xsave_eax:-1 > > > > /* > > * opt_cpuid_mask_ecx/edx: cpuid.1[ecx, edx] feature mask. > > * For example, E8400[Intel Core 2 Duo Processor series] ecx = > 0x0008E3FD, > > * edx = 0xBFEBFBFF when executing CPUID.EAX = 1 normally. If you want to > > * 'rev down' to E8400, you can set these values in these Xen boot > > parameters. > > */ > > static void __devinit set_cpuidmask(const struct cpuinfo_x86 *c) > > { > > u32 eax, edx; > > const char *extra = ""; > > > > > > printk(XENLOG_INFO "opt_cpuid_mask_ecx:%d > > opt_cpuid_mask_edx:%d opt_cpuid_mask_ext_ecx:%d > > opt_cpuid_mask_ext_edx:%d opt_cpuid_mask_xsave_eax:%d\n", > > opt_cpuid_mask_ecx, opt_cpuid_mask_edx, opt_cpuid_mask_ext_ecx, > > opt_cpuid_mask_ext_edx,opt_cpuid_mask_xsave_eax); > > if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx & > > opt_cpuid_mask_ext_ecx & opt_cpuid_mask_ext_edx & > > opt_cpuid_mask_xsave_eax)) > > return; > > > > /************************** > > * Unreachable code (?) > > **************************/ > > > > /* Only family 6 supports this feature */ > > switch ((c->x86 == 6) * c->x86_model) { > > case 0x17: > > if ((c->x86_mask & 0x0f) < 4) > > break; > > /* fall through */ > > case 0x1d: > > wrmsr(MSR_INTEL_CPUID_FEATURE_MASK, > > ... > > --000e0cd5c06a85109f04d8fdd65c Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Thanks for quick response.

How can I overwrite values us= ing command line?
I want to hide AVX flag even though my CPU is s= andybridge.

Thanks,


2013/3/29 Andrew Cooper <andrew.cooper3@citrix.com><= br>
On 28/03/2013 14:40, Choonho Son wrote:
> Hi all,
>
> I still have some questions about cpu flags.
> -
> Reference: http://lists.xen.org/archives/html/xe= n-devel/2013-03/msg00891.html
>
> I printed the values about following code:
> =A0if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx &
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0opt_cpuid_mask_ext_ecx & opt_cpuid_= mask_ext_edx &
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0opt_cpuid_mask_xsave_eax))
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return;
>
> Above code is always true, so the next "switch" code is not = reachable.
> Is it correct code?

No - these variables can be specified on the command line, as is the<= br> convention with variable beginning "opt_".

The result is that if the user specifies any of them, we enter the
switch statement and apply the appropriate feature masking.

~Andrew

>
> ##############################
> # Source: xen/arch/x86/cpu/intel.c
> ##############################
>
> #################
> # debugging result
> #################
> (XEN) opt_cpuid_mask_ecx:-1 opt_cpuid_mask_edx:-1
> opt_cpuid_mask_ext_ecx:-1 opt_cpuid_mask_ext_edx:-1
> opt_cpuid_mask_xsave_eax:-1
>
> /*
> =A0* opt_cpuid_mask_ecx/edx: cpuid.1[ecx, edx] feature mask.
> =A0* For example, E8400[Intel Core 2 Duo Processor series] ecx =3D 0x0= 008E3FD,
> =A0* edx =3D 0xBFEBFBFF when executing CPUID.EAX =3D 1 normally. If yo= u want to
> =A0* 'rev down' to E8400, you can set these values in these Xe= n boot
> parameters.
> =A0*/
> static void __devinit set_cpuidmask(const struct cpuinfo_x86 *c)
> {
> =A0 =A0 =A0 =A0 u32 eax, edx;
> =A0 =A0 =A0 =A0 const char *extra =3D "";
>
>
> =A0 =A0 =A0 =A0 printk(XENLOG_INFO =A0"opt_cpuid_mask_ecx:%d
> opt_cpuid_mask_edx:%d opt_cpuid_mask_ext_ecx:%d
> opt_cpuid_mask_ext_edx:%d opt_cpuid_mask_xsave_eax:%d\n",
> opt_cpuid_mask_ecx, opt_cpuid_mask_edx, opt_cpuid_mask_ext_ecx,
> opt_cpuid_mask_ext_edx,opt_cpuid_mask_xsave_eax);
> =A0 =A0 =A0 =A0 if (!~(opt_cpuid_mask_ecx & opt_cpuid_mask_edx &am= p;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0opt_cpuid_mask_ext_ecx & opt_cpuid_= mask_ext_edx &
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0opt_cpuid_mask_xsave_eax))
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return;
>
> =A0 =A0 =A0 =A0 /**************************
> =A0 =A0 =A0 =A0 =A0* Unreachable code (?)
> =A0 =A0 =A0 =A0 =A0**************************/
>
> =A0 =A0 =A0 =A0 /* Only family 6 supports this feature =A0*/
> =A0 =A0 =A0 =A0 switch ((c->x86 =3D=3D 6) * c->x86_model) {
> =A0 =A0 =A0 =A0 case 0x17:
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if ((c->x86_mask & 0x0f) < 4= )
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 break;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* fall through */
> =A0 =A0 =A0 =A0 case 0x1d:
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 wrmsr(MSR_INTEL_CPUID_FEATURE_MASK, > =A0 =A0 =A0 =A0 =A0...


--000e0cd5c06a85109f04d8fdd65c-- --===============8349791054781157429== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --===============8349791054781157429==--