From mboxrd@z Thu Jan  1 00:00:00 1970
From: Kenneth Graunke <kenneth@whitecape.org>
Subject: Re: [PATCH] drm/i915: Don't override PPGTT cacheability
 on HSW
Date: Wed, 03 Apr 2013 12:17:28 -0700
Message-ID: <515C8048.1080503@whitecape.org>
References: <1365012390-6465-1-git-send-email-ben@bwidawsk.net>
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To: Ben Widawsky <ben@bwidawsk.net>
Cc: intel-gfx@lists.freedesktop.org
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On 04/03/2013 11:06 AM, Ben Widawsky wrote:
> Apparently these ECOCHK bits changed on HSW and the behavior is not what
> we want. I've not been able to find VLV definition specifically so I'll
> assume it's the same as IVB.
>
> (Only compile tested)
>
> Reported-by: Kenneth Graunke <kenneth@whitecape.org>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

The behavior isn't particularly bad, but the PTEs already take care of 
this for us, so it doesn't do anything.  That said, having random 
override bits set for no purpose is bad...we should just let the PTEs do 
their job.

Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org>

Thanks Ben!