From: Stephen Warren <swarren@wwwdotorg.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] Tegra114: Initialize System Counter (TSC) with osc frequency
Date: Wed, 03 Apr 2013 17:26:02 -0600 [thread overview]
Message-ID: <515CBA8A.6060004@wwwdotorg.org> (raw)
In-Reply-To: <1365030744-12562-1-git-send-email-twarren@nvidia.com>
On 04/03/2013 05:12 PM, Tom Warren wrote:
> T114 needs the SYSCTR0 counter initialized so the TSC can be
> read by the kernel. Do it in the bootloader since it's a write-once
> deal (secure/non-secure mode dependent).
> diff --git a/arch/arm/cpu/tegra-common/clock.c b/arch/arm/cpu/tegra-common/clock.c
> @@ -557,4 +557,7 @@ void clock_init(void)
...
> + /* Do any special system timer/TSC setup */
> + arch_timer_init();
I wonder if we shouldn't ifdef that, so that ...
> diff --git a/arch/arm/cpu/tegra20-common/clock.c b/arch/arm/cpu/tegra20-common/clock.c
> +void arch_timer_init(void)
> +{
> +}
We don't need those stubs on the chips that don't support this. (I
imagine that for future chips, the implementation will be common and
will move out of the chip-specific file into some arch-timers file).
Either way though,
Reviewed-by: Stephen Warren <swarren@nvidia.com>
next prev parent reply other threads:[~2013-04-03 23:26 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-03 23:12 [U-Boot] [PATCH] Tegra114: Initialize System Counter (TSC) with osc frequency Tom Warren
2013-04-03 23:26 ` Stephen Warren [this message]
2013-04-03 23:31 ` Tom Warren
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