Re: ASOC snd_soc_dai_ops for clock mux control

["Gabriel M. Beddingfield" <gabrbedd@gmail.com>]

On 04/03/2013 09:22 AM, Gellner, Christoph (ADITG/SW1) wrote:
> Hi all,
>
> I'm working on the driver of an audio CPU DAI IP providing
> -       Internal clocks which can be used for master clock generation by TX as well as RX section
> -       One oversampling clock available to RX section
> -       One oversampling clock available to TX section.
>
> Kernel version is 3.5.7
>
> I want to add support to the CPU DAI driver to
> -       Specify the rate of the input clocks
> -       Select which of the clock inputs shall be used by RX and which shall be used by TX section
>
> I'm currently wondering how to map this to existing snd_soc_dai_ops functions.
> Currently I see only set_sysclk, set_pll, set_clkdiv for clock control.
>
> I plan to use set_sysclk to specify the rate as well as the direction of each clock.
>
> What is currently missing for me is a way to specify the clock to be used by RX or TX section.
>
> Do you have any recommendation how to implement ?


Let's say your CPU DAI IP has 3 clocks which we'll call MCLK (master 
clock), FLL1, and FLL2 (the two oversampling clocks).

Are you wanting a way to say: "RX should use FLL1 and TX should use FLL2" ??

If so, there's a couple options I can think of.  (A) You could call a 
codec-specific API in your machine driver that expresses this intent. 
(B) you could create "virtual" clock ID's that express the mapping (e.g. 
FLL1_TX, FLL1_RX, FLL2_TX, FLL2_RX).  I think (A) is a cleaner solution 
that clearly communicates what is happening.

-gabriel