diff for duplicates of <515E89BA.9010709@ti.com> diff --git a/a/1.txt b/N1/1.txt index f14c812..3628067 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -45,7 +45,7 @@ Add l3-noc node for OMAP4 and OMAP5 devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> -[jon-hunter@ti.com: Fix the problem caused by adding 32 to the interrupt +[jon-hunter at ti.com: Fix the problem caused by adding 32 to the interrupt number for the L3 interrupts to account for per processor interrupts (PPI) and software generated interrupts (SGI) which typically are mapped to the first 32 interrupts in the ARM GIC. This is not necessary because the first @@ -73,7 +73,7 @@ index ddfc54a..3ae6a3f 100644 + interrupts = <0 9 0x4>, + <0 10 0x4>; - counter32k: counter@4a304000 { + counter32k: counter at 4a304000 { compatible = "ti,omap-counter32k"; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index e539258..94b5ec9 100644 @@ -89,7 +89,7 @@ index e539258..94b5ec9 100644 + interrupts = <0 9 0x4>, + <0 10 0x4>; - counter32k: counter@4ae04000 { + counter32k: counter at 4ae04000 { compatible = "ti,omap-counter32k"; -- 1.7.0.4 diff --git a/a/content_digest b/N1/content_digest index 2a3527a..50fdcdf 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,15 +1,10 @@ "ref\01365098790-9078-1-git-send-email-jon-hunter@ti.com\0" "ref\0515E6EAE.9000107@ti.com\0" "ref\0515E8677.40404@ti.com\0" - "From\0Benoit Cousson <b-cousson@ti.com>\0" - "Subject\0Re: [PATCH] ARM: dts: OMAP4+: Correct L3 interrupts\0" + "From\0b-cousson@ti.com (Benoit Cousson)\0" + "Subject\0[PATCH] ARM: dts: OMAP4+: Correct L3 interrupts\0" "Date\0Fri, 5 Apr 2013 10:22:18 +0200\0" - "To\0Santosh Shilimkar <santosh.shilimkar@ti.com>" - " Jon Hunter <jon-hunter@ti.com>\0" - "Cc\0Tony Lindgren <tony@atomide.com>" - device-tree <devicetree-discuss@lists.ozlabs.org> - linux-omap <linux-omap@vger.kernel.org> - " linux-arm <linux-arm-kernel@lists.infradead.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Santosh and Jon,\n" @@ -59,7 +54,7 @@ "\n" "Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>\n" "\n" - "[jon-hunter@ti.com: Fix the problem caused by adding 32 to the interrupt\n" + "[jon-hunter at ti.com: Fix the problem caused by adding 32 to the interrupt\n" "number for the L3 interrupts to account for per processor interrupts (PPI)\n" "and software generated interrupts (SGI) which typically are mapped to the\n" "first 32 interrupts in the ARM GIC. This is not necessary because the first\n" @@ -87,7 +82,7 @@ "+\t\tinterrupts = <0 9 0x4>,\n" "+\t\t\t <0 10 0x4>;\n" " \n" - " \t\tcounter32k: counter@4a304000 {\n" + " \t\tcounter32k: counter at 4a304000 {\n" " \t\t\tcompatible = \"ti,omap-counter32k\";\n" "diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi\n" "index e539258..94b5ec9 100644\n" @@ -103,9 +98,9 @@ "+\t\tinterrupts = <0 9 0x4>,\n" "+\t\t\t <0 10 0x4>;\n" " \n" - " \t\tcounter32k: counter@4ae04000 {\n" + " \t\tcounter32k: counter at 4ae04000 {\n" " \t\t\tcompatible = \"ti,omap-counter32k\";\n" "-- \n" 1.7.0.4 -cd1af8364b4c32af79f7533c1b7059515e41a34b4c3950f2062bd1077bd5f8fa +04b4bb9037bc44b24a58c220c0f5f25266473fdcf0add63e015f546855fd8fbd
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